From 33ff44c37ccb96c209b002e5430deefc00cc5591 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 22 May 2018 01:15:22 +0300 Subject: binaryPI: Use pcidev_on_root() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We have constant CONFIG_CBB==0, replace ill dev_find_slot() with safe pcidev_on_root(); Change-Id: If536adf11aacef8faa3455692285552f97531df9 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/26483 Reviewed-by: Arthur Heymans Tested-by: build bot (Jenkins) --- src/southbridge/amd/pi/hudson/lpc.c | 2 +- src/southbridge/amd/pi/hudson/sd.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/southbridge/amd/pi/hudson') diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c index 587fd95b27..9b8753a3fe 100644 --- a/src/southbridge/amd/pi/hudson/lpc.c +++ b/src/southbridge/amd/pi/hudson/lpc.c @@ -38,7 +38,7 @@ static void lpc_init(struct device *dev) struct device *sm_dev; /* Enable the LPC Controller */ - sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); + sm_dev = pcidev_on_root(0x14, 0); dword = pci_read_config32(sm_dev, 0x64); dword |= 1 << 20; pci_write_config32(sm_dev, 0x64, dword); diff --git a/src/southbridge/amd/pi/hudson/sd.c b/src/southbridge/amd/pi/hudson/sd.c index a87367fef5..8bb7538b29 100644 --- a/src/southbridge/amd/pi/hudson/sd.c +++ b/src/southbridge/amd/pi/hudson/sd.c @@ -25,7 +25,7 @@ static void sd_init(struct device *dev) { u32 stepping; - stepping = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x18, 3)), 0xFC); + stepping = pci_read_config32(pcidev_on_root(0x18, 3), 0xFC); struct southbridge_amd_pi_hudson_config *sd_chip = (struct southbridge_amd_pi_hudson_config *)(dev->chip_info); -- cgit v1.2.3