From f2dfef01e1fdf9d8218f0bc6ecfc3f943dc4d2a1 Mon Sep 17 00:00:00 2001 From: WANG Siyuan Date: Wed, 20 May 2015 14:41:01 +0800 Subject: southbridge/amd/pi: Add support for new AMD southbridge Kern Kern is the southbridge of AMD Merlin Falcon(Carrizo). This add support of HD audio, lpc, sata and usb for Kern. Change-Id: Ie47e38bc1099cdb72002619cb1da269f3739678b Signed-off-by: WANG Siyuan Signed-off-by: WANG Siyuan Reviewed-on: http://review.coreboot.org/10418 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones Reviewed-by: Stefan Reinauer --- src/southbridge/amd/pi/hudson/acpi/pcie.asl | 8 ++++++++ src/southbridge/amd/pi/hudson/acpi/usb.asl | 4 ++-- 2 files changed, 10 insertions(+), 2 deletions(-) (limited to 'src/southbridge/amd/pi/hudson/acpi') diff --git a/src/southbridge/amd/pi/hudson/acpi/pcie.asl b/src/southbridge/amd/pi/hudson/acpi/pcie.asl index dbf4ccbd04..0626cab158 100644 --- a/src/southbridge/amd/pi/hudson/acpi/pcie.asl +++ b/src/southbridge/amd/pi/hudson/acpi/pcie.asl @@ -90,6 +90,14 @@ } IndexField (PIOI, PIOD, ByteAcc, NoLock, Preserve) { + Offset(0x60), /* AcpiPm1EvgBlk */ + P1EB, 16, Offset(0xEE), UPWS, 3, } + OperationRegion (P1E0, SystemIO, P1EB, 0x04) + Field (P1E0, ByteAcc, Nolock, Preserve) { + Offset(0x02), + , 14, + PEWD, 1, + } diff --git a/src/southbridge/amd/pi/hudson/acpi/usb.asl b/src/southbridge/amd/pi/hudson/acpi/usb.asl index 453d792806..9b56985b1f 100644 --- a/src/southbridge/amd/pi/hudson/acpi/usb.asl +++ b/src/southbridge/amd/pi/hudson/acpi/usb.asl @@ -54,7 +54,7 @@ Device(UOH6) { Name(_PRW, Package() {0x0B, 3}) } /* end UOH5 */ -#if !CONFIG_SOUTHBRIDGE_AMD_PI_AVALON +#if !CONFIG_SOUTHBRIDGE_AMD_PI_AVALON && !CONFIG_SOUTHBRIDGE_AMD_PI_KERN /* 0:14.5 - OHCI */ Device(UEH1) { Name(_ADR, 0x00140005) @@ -68,7 +68,7 @@ Device(XHC0) { Name(_PRW, Package() {0x0B, 4}) } /* end XHC0 */ -#if !CONFIG_SOUTHBRIDGE_AMD_PI_AVALON +#if !CONFIG_SOUTHBRIDGE_AMD_PI_AVALON && !CONFIG_SOUTHBRIDGE_AMD_PI_KERN /* 0:10.1 - XHCI 1*/ Device(XHC1) { Name(_ADR, 0x00100001) -- cgit v1.2.3