From 6f9f977cce9d25603201d64a1241d9cbf89d2f75 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Sat, 28 Jan 2006 19:56:25 +0000 Subject: rename git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2166 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/amd/cs5535/cs5530.c | 92 --------------------------------- src/southbridge/amd/cs5535/cs5530.h | 4 -- src/southbridge/amd/cs5535/cs5530_ide.c | 30 ----------- src/southbridge/amd/cs5535/cs5535.c | 92 +++++++++++++++++++++++++++++++++ src/southbridge/amd/cs5535/cs5535.h | 4 ++ src/southbridge/amd/cs5535/cs5535_ide.c | 30 +++++++++++ 6 files changed, 126 insertions(+), 126 deletions(-) delete mode 100644 src/southbridge/amd/cs5535/cs5530.c delete mode 100644 src/southbridge/amd/cs5535/cs5530.h delete mode 100644 src/southbridge/amd/cs5535/cs5530_ide.c create mode 100644 src/southbridge/amd/cs5535/cs5535.c create mode 100644 src/southbridge/amd/cs5535/cs5535.h create mode 100644 src/southbridge/amd/cs5535/cs5535_ide.c (limited to 'src/southbridge/amd/cs5535') diff --git a/src/southbridge/amd/cs5535/cs5530.c b/src/southbridge/amd/cs5535/cs5530.c deleted file mode 100644 index 85028c2a09..0000000000 --- a/src/southbridge/amd/cs5535/cs5530.c +++ /dev/null @@ -1,92 +0,0 @@ - -#include -#include -#include -#include -#include -#include -#include "cs5535.h" - -static void nvram_on(struct device *dev) -{ -#if 0 - volatile char *flash = (volatile unsigned char *)0xFFFc0000; - unsigned char id1, id2; -#endif - unsigned char reg; - - /* Enable writes to flash at top of memory */ - pci_write_config8(dev, 0x52, 0xee); - - /* Set positive decode on ROM */ - /* Also, there is no apparent reason to turn off the devoce on the */ - /* IDE devices */ - - reg = pci_read_config8(dev, 0x5b); - reg |= 1 << 5; /* ROM Decode */ - reg |= 1 << 3; /* Primary IDE decode */ - reg |= 1 << 4; /* Secondary IDE decode */ - - pci_write_config8(dev, 0x5b, reg); - -#if 0 // just to test if the flash is accessible! - *(flash + 0x555) = 0xaa; - *(flash + 0x2aa) = 0x55; - *(flash + 0x555) = 0x90; - - id1 = *(volatile unsigned char *) flash; - id2 = *(volatile unsigned char *) (flash + 1); - - *flash = 0xf0; - - printk_debug("Flash device: MFGID %02x, DEVID %02x\n", id1, id2); -#endif -} - - -static void southbridge_init(struct device *dev) -{ - printk_spew("cs5535: %s\n", __FUNCTION__); - nvram_on(dev); -} - -/* -static void dump_south(struct device *dev) -{ - int i, j; - - for(i=0; i<256; i+=16) { - printk_debug("0x%02x: ", i); - for(j=0; j<16; j++) - printk_debug("%02x ", pci_read_config8(dev, i+j)); - printk_debug("\n"); - } -} -*/ - -static void southbridge_enable(struct device *dev) -{ - printk_spew("%s: dev is %p\n", __FUNCTION__, dev); -} - -static void cs5535_pci_dev_enable_resources(device_t dev) -{ - printk_spew("cs5535.c: %s()\n", __FUNCTION__); - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - -static struct device_operations southbridge_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = cs5535_pci_dev_enable_resources, - .init = southbridge_init, - .enable = southbridge_enable, - .scan_bus = scan_static_bus, -}; - -static struct pci_driver cs5535_pci_driver __pci_driver = { - .ops = &southbridge_ops, - .vendor = PCI_VENDOR_ID_CYRIX, - .device = PCI_DEVICE_ID_CYRIX_5535_LEGACY, -}; diff --git a/src/southbridge/amd/cs5535/cs5530.h b/src/southbridge/amd/cs5535/cs5530.h deleted file mode 100644 index 82d657204a..0000000000 --- a/src/southbridge/amd/cs5535/cs5530.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef _CS5535_H -#define _CS5535_H - -#endif diff --git a/src/southbridge/amd/cs5535/cs5530_ide.c b/src/southbridge/amd/cs5535/cs5530_ide.c deleted file mode 100644 index fc875f9ace..0000000000 --- a/src/southbridge/amd/cs5535/cs5530_ide.c +++ /dev/null @@ -1,30 +0,0 @@ -#include -#include -#include -#include -#include -#include "cs5535.h" - -static void ide_init(struct device *dev) -{ - printk_spew("cs5535_ide: %s\n", __FUNCTION__); -} - -static void ide_enable(struct device *dev) -{ - printk_spew("cs5535_ide: %s\n", __FUNCTION__); -} - -static struct device_operations ide_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = ide_init, - .enable = ide_enable, -}; - -static struct pci_driver ide_driver __pci_driver = { - .ops = &ide_ops, - .vendor = PCI_VENDOR_ID_AMD, - .device = PCI_DEVICE_ID_AMD_5535_IDE, -}; diff --git a/src/southbridge/amd/cs5535/cs5535.c b/src/southbridge/amd/cs5535/cs5535.c new file mode 100644 index 0000000000..85028c2a09 --- /dev/null +++ b/src/southbridge/amd/cs5535/cs5535.c @@ -0,0 +1,92 @@ + +#include +#include +#include +#include +#include +#include +#include "cs5535.h" + +static void nvram_on(struct device *dev) +{ +#if 0 + volatile char *flash = (volatile unsigned char *)0xFFFc0000; + unsigned char id1, id2; +#endif + unsigned char reg; + + /* Enable writes to flash at top of memory */ + pci_write_config8(dev, 0x52, 0xee); + + /* Set positive decode on ROM */ + /* Also, there is no apparent reason to turn off the devoce on the */ + /* IDE devices */ + + reg = pci_read_config8(dev, 0x5b); + reg |= 1 << 5; /* ROM Decode */ + reg |= 1 << 3; /* Primary IDE decode */ + reg |= 1 << 4; /* Secondary IDE decode */ + + pci_write_config8(dev, 0x5b, reg); + +#if 0 // just to test if the flash is accessible! + *(flash + 0x555) = 0xaa; + *(flash + 0x2aa) = 0x55; + *(flash + 0x555) = 0x90; + + id1 = *(volatile unsigned char *) flash; + id2 = *(volatile unsigned char *) (flash + 1); + + *flash = 0xf0; + + printk_debug("Flash device: MFGID %02x, DEVID %02x\n", id1, id2); +#endif +} + + +static void southbridge_init(struct device *dev) +{ + printk_spew("cs5535: %s\n", __FUNCTION__); + nvram_on(dev); +} + +/* +static void dump_south(struct device *dev) +{ + int i, j; + + for(i=0; i<256; i+=16) { + printk_debug("0x%02x: ", i); + for(j=0; j<16; j++) + printk_debug("%02x ", pci_read_config8(dev, i+j)); + printk_debug("\n"); + } +} +*/ + +static void southbridge_enable(struct device *dev) +{ + printk_spew("%s: dev is %p\n", __FUNCTION__, dev); +} + +static void cs5535_pci_dev_enable_resources(device_t dev) +{ + printk_spew("cs5535.c: %s()\n", __FUNCTION__); + pci_dev_enable_resources(dev); + enable_childrens_resources(dev); +} + +static struct device_operations southbridge_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = cs5535_pci_dev_enable_resources, + .init = southbridge_init, + .enable = southbridge_enable, + .scan_bus = scan_static_bus, +}; + +static struct pci_driver cs5535_pci_driver __pci_driver = { + .ops = &southbridge_ops, + .vendor = PCI_VENDOR_ID_CYRIX, + .device = PCI_DEVICE_ID_CYRIX_5535_LEGACY, +}; diff --git a/src/southbridge/amd/cs5535/cs5535.h b/src/southbridge/amd/cs5535/cs5535.h new file mode 100644 index 0000000000..82d657204a --- /dev/null +++ b/src/southbridge/amd/cs5535/cs5535.h @@ -0,0 +1,4 @@ +#ifndef _CS5535_H +#define _CS5535_H + +#endif diff --git a/src/southbridge/amd/cs5535/cs5535_ide.c b/src/southbridge/amd/cs5535/cs5535_ide.c new file mode 100644 index 0000000000..fc875f9ace --- /dev/null +++ b/src/southbridge/amd/cs5535/cs5535_ide.c @@ -0,0 +1,30 @@ +#include +#include +#include +#include +#include +#include "cs5535.h" + +static void ide_init(struct device *dev) +{ + printk_spew("cs5535_ide: %s\n", __FUNCTION__); +} + +static void ide_enable(struct device *dev) +{ + printk_spew("cs5535_ide: %s\n", __FUNCTION__); +} + +static struct device_operations ide_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = ide_init, + .enable = ide_enable, +}; + +static struct pci_driver ide_driver __pci_driver = { + .ops = &ide_ops, + .vendor = PCI_VENDOR_ID_AMD, + .device = PCI_DEVICE_ID_AMD_5535_IDE, +}; -- cgit v1.2.3