From f1b58b78351d7ed220673e688a2f7bc9e96da4e2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 1 Mar 2019 13:43:02 +0200 Subject: device/pci: Fix PCI accessor headers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PCI config accessors are no longer indirectly included from use instead. Change-Id: I2adf46430a33bc52ef69d1bf7dca4655fc8475bd Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/31675 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Angel Pons Reviewed-by: Arthur Heymans Reviewed-by: Felix Held --- src/southbridge/amd/cimx/sb900/bootblock.c | 1 + src/southbridge/amd/cimx/sb900/lpc.c | 1 + src/southbridge/amd/cimx/sb900/reset.c | 1 + 3 files changed, 3 insertions(+) (limited to 'src/southbridge/amd/cimx/sb900') diff --git a/src/southbridge/amd/cimx/sb900/bootblock.c b/src/southbridge/amd/cimx/sb900/bootblock.c index a06946352c..734cc7a831 100644 --- a/src/southbridge/amd/cimx/sb900/bootblock.c +++ b/src/southbridge/amd/cimx/sb900/bootblock.c @@ -14,6 +14,7 @@ */ #include +#include static void sb900_enable_rom(void) { diff --git a/src/southbridge/amd/cimx/sb900/lpc.c b/src/southbridge/amd/cimx/sb900/lpc.c index 64b6aa51de..b04ecfa123 100644 --- a/src/southbridge/amd/cimx/sb900/lpc.c +++ b/src/southbridge/amd/cimx/sb900/lpc.c @@ -14,6 +14,7 @@ */ #include +#include #include "lpc.h" #include /* printk */ #include diff --git a/src/southbridge/amd/cimx/sb900/reset.c b/src/southbridge/amd/cimx/sb900/reset.c index db0aebb9ee..4b96d3c8c0 100644 --- a/src/southbridge/amd/cimx/sb900/reset.c +++ b/src/southbridge/amd/cimx/sb900/reset.c @@ -17,6 +17,7 @@ #define __SIMPLE_DEVICE__ #include +#include #include #include -- cgit v1.2.3