From 01bd79ff697b4a6976e2b03ff15f4853fa561c0d Mon Sep 17 00:00:00 2001 From: zbao Date: Fri, 23 Mar 2012 11:36:08 +0800 Subject: Add sb800 spi support. It is for S3, storing the recovring data in the nonvolatile storage, i.e., flash. Change-Id: Ie9e4f42a80c93d92d2e442f0e833ce06d88294f9 Signed-off-by: Zheng Bao Signed-off-by: zbao Reviewed-on: http://review.coreboot.org/620 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones --- src/southbridge/amd/cimx/sb800/Makefile.inc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/southbridge/amd/cimx/sb800/Makefile.inc') diff --git a/src/southbridge/amd/cimx/sb800/Makefile.inc b/src/southbridge/amd/cimx/sb800/Makefile.inc index 30d2133715..2b55feeb1c 100644 --- a/src/southbridge/amd/cimx/sb800/Makefile.inc +++ b/src/southbridge/amd/cimx/sb800/Makefile.inc @@ -27,6 +27,8 @@ romstage-y += smbus.c ramstage-y += cfg.c ramstage-y += late.c +ramstage-$(CONFIG_HAVE_ACPI_RESUME) += spi.c + driver-y += smbus.c driver-y += lpc.c -- cgit v1.2.3