From b97a303fa69f54e8a880f5c4607d8ee9c9173b16 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Fri, 7 Aug 2020 22:30:04 +0200 Subject: cpu/amd/agesa: Use common MRC_CACHE code to save S3 data MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use the common code to save data for fast boot or S3 resume. An notable improvement that comes with this, is that the same 4K page is not rewritten all the time. This prolongs the hardware's life. TESTED on pcengines/apu1 and lenovo/g505s: S3 resume works fine. Change-Id: I0f4f36dcead52a6c550fb5e606772e0a99029872 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/44295 Reviewed-by: Mike Banon Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki Reviewed-by: Michał Żygowski --- src/southbridge/amd/cimx/sb800/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/southbridge/amd/cimx/sb800/Kconfig') diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig index fcfdfb4a68..7ab2cc1c07 100644 --- a/src/southbridge/amd/cimx/sb800/Kconfig +++ b/src/southbridge/amd/cimx/sb800/Kconfig @@ -11,6 +11,7 @@ config SOUTHBRIDGE_AMD_CIMX_SB800 select SOC_AMD_COMMON_BLOCK_ACPIMMIO select SOC_AMD_COMMON_BLOCK_ACPIMMIO_BIOSRAM select SOC_AMD_COMMON_BLOCK_PCI_MMCONF + select BOOT_DEVICE_SUPPORTS_WRITES if SOUTHBRIDGE_AMD_CIMX_SB800 config ENABLE_IDE_COMBINED_MODE -- cgit v1.2.3