From de271a8f0a9b5d910ee98eeea25f71d4e1536f73 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Wed, 18 Mar 2015 13:09:47 +0200 Subject: PCI subsystem: Drop parameter max from scan_bus MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ib33d3363c8d42fa54ac07c11a7ab2bc7ee4ae8bf Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/8539 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand Reviewed-by: Patrick Georgi --- src/southbridge/amd/amd8132/bridge.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) (limited to 'src/southbridge/amd/amd8132/bridge.c') diff --git a/src/southbridge/amd/amd8132/bridge.c b/src/southbridge/amd/amd8132/bridge.c index 2684e7c241..48d7c5168c 100644 --- a/src/southbridge/amd/amd8132/bridge.c +++ b/src/southbridge/amd/amd8132/bridge.c @@ -138,15 +138,14 @@ static void amd8132_pcix_tune_dev(device_t dev, void *ptr) } -static unsigned int amd8132_scan_bus(struct bus *bus, - unsigned min_devfn, unsigned max_devfn, unsigned int max) +static void amd8132_scan_bus(struct bus *bus, + unsigned min_devfn, unsigned max_devfn) { struct amd8132_bus_info info; unsigned pos; - /* Find the children on the bus */ - max = pci_scan_bus(bus, min_devfn, max_devfn, max); + pci_scan_bus(bus, min_devfn, max_devfn); /* Find the revision of the 8132 */ info.rev = pci_read_config8(bus->dev, PCI_CLASS_REVISION); @@ -181,20 +180,18 @@ static unsigned int amd8132_scan_bus(struct bus *bus, pcix_misc &= ~(0x1f << 16); pci_write_config32(bus->dev, 0x40, pcix_misc); - return max; + return; } #endif /* If we are in conventional PCI mode nothing more is necessary. */ if (PCI_X_SSTATUS_MFREQ(info.sstatus) == PCI_X_SSTATUS_CONVENTIONAL_PCI) { - return max; + return; } /* Tune the devices on the bus */ amd8132_walk_children(bus, amd8132_pcix_tune_dev, &info); - - return max; } static unsigned int amd8132_scan_bridge(device_t dev, unsigned int max) -- cgit v1.2.3