From c02b4fc9db3c3c1e263027382697b566127f66bb Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Mon, 22 Mar 2010 11:42:32 +0000 Subject: printk_foo -> printk(BIOS_FOO, ...) Signed-off-by: Stefan Reinauer Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/amd/amd8111/amd8111_acpi.c | 14 +++++++------- src/southbridge/amd/amd8111/amd8111_ide.c | 4 ++-- src/southbridge/amd/amd8111/amd8111_lpc.c | 2 +- src/southbridge/amd/amd8111/amd8111_nic.c | 4 ++-- src/southbridge/amd/amd8111/amd8111_usb2.c | 2 +- 5 files changed, 13 insertions(+), 13 deletions(-) (limited to 'src/southbridge/amd/amd8111') diff --git a/src/southbridge/amd/amd8111/amd8111_acpi.c b/src/southbridge/amd/amd8111/amd8111_acpi.c index 67a789c08a..32e3808a98 100644 --- a/src/southbridge/amd/amd8111/amd8111_acpi.c +++ b/src/southbridge/amd/amd8111/amd8111_acpi.c @@ -79,7 +79,7 @@ static void acpi_init(struct device *dev) #if 0 uint16_t word; - printk_debug("ACPI: disabling NMI watchdog.. "); + printk(BIOS_DEBUG, "ACPI: disabling NMI watchdog.. "); byte = pci_read_config8(dev, 0x49); pci_write_config8(dev, 0x49, byte | (1<<2)); @@ -91,13 +91,13 @@ static void acpi_init(struct device *dev) byte = pci_read_config8(dev, 0x48); pci_write_config8(dev, 0x48, byte | (1<<3)); - printk_debug("done.\n"); + printk(BIOS_DEBUG, "done.\n"); - printk_debug("ACPI: Routing IRQ 12 to PS2 port.. "); + printk(BIOS_DEBUG, "ACPI: Routing IRQ 12 to PS2 port.. "); word = pci_read_config16(dev, 0x46); pci_write_config16(dev, 0x46, word | (1<<9)); - printk_debug("done.\n"); + printk(BIOS_DEBUG, "done.\n"); #endif /* To enable the register 0xcf9 in the IO space @@ -119,7 +119,7 @@ static void acpi_init(struct device *dev) byte |= 0x40; } pci_write_config8(dev, PREVIOUS_POWER_STATE, byte); - printk_info("set power %s after power fail\n", on?"on":"off"); + printk(BIOS_INFO, "set power %s after power fail\n", on?"on":"off"); /* switch serial irq logic from quiet mode to continuous * mode for Winbond W83627HF Rev. 17 @@ -135,13 +135,13 @@ static void acpi_init(struct device *dev) outl(((on<<1)+0x10) ,(pm10_bar + 0x10)); dword = inl(pm10_bar + 0x10); on = 8-on; - printk_debug("Throttling CPU %2d.%1.1d percent.\n", + printk(BIOS_DEBUG, "Throttling CPU %2d.%1.1d percent.\n", (on*12)+(on>>1),(on&1)*5); } #if CONFIG_GENERATE_ACPI_TABLES == 1 pm_base = pci_read_config16(dev, 0x58) & 0xff00; - printk_debug("pm_base: 0x%04x\n",pm_base); + printk(BIOS_DEBUG, "pm_base: 0x%04x\n",pm_base); #endif } diff --git a/src/southbridge/amd/amd8111/amd8111_ide.c b/src/southbridge/amd/amd8111/amd8111_ide.c index 6a1fd553b2..3b6f5a0a65 100644 --- a/src/southbridge/amd/amd8111/amd8111_ide.c +++ b/src/southbridge/amd/amd8111/amd8111_ide.c @@ -19,12 +19,12 @@ static void ide_init(struct device *dev) if (conf->ide1_enable) { /* Enable secondary ide interface */ word |= (1<<0); - printk_debug("IDE1 "); + printk(BIOS_DEBUG, "IDE1 "); } if (conf->ide0_enable) { /* Enable primary ide interface */ word |= (1<<1); - printk_debug("IDE0 "); + printk(BIOS_DEBUG, "IDE0 "); } word |= (1<<12); diff --git a/src/southbridge/amd/amd8111/amd8111_lpc.c b/src/southbridge/amd/amd8111/amd8111_lpc.c index edb32c240c..85e217bb65 100644 --- a/src/southbridge/amd/amd8111/amd8111_lpc.c +++ b/src/southbridge/amd/amd8111/amd8111_lpc.c @@ -22,7 +22,7 @@ static void enable_hpet(struct device *dev) pci_write_config32(dev,0xa0, 0xfed00001); hpet_address = pci_read_config32(dev,0xa0)& 0xfffffffe; - printk_debug("enabling HPET @0x%lx\n", hpet_address); + printk(BIOS_DEBUG, "enabling HPET @0x%lx\n", hpet_address); } diff --git a/src/southbridge/amd/amd8111/amd8111_nic.c b/src/southbridge/amd/amd8111/amd8111_nic.c index aa06253a46..8818b51b40 100644 --- a/src/southbridge/amd/amd8111/amd8111_nic.c +++ b/src/southbridge/amd/amd8111/amd8111_nic.c @@ -52,7 +52,7 @@ static void nic_init(struct device *dev) mmio = resource->base; /* Hard Reset PHY */ - printk_debug("Reseting PHY... "); + printk(BIOS_DEBUG, "Reseting PHY... "); if (conf->phy_lowreset) { write32((mmio + CMD3), VAL0 | PHY_RST_POL | RESET_PHY); } else { @@ -60,7 +60,7 @@ static void nic_init(struct device *dev) } mdelay(15); write32((mmio + CMD3), RESET_PHY); - printk_debug("Done\n"); + printk(BIOS_DEBUG, "Done\n"); } static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device) diff --git a/src/southbridge/amd/amd8111/amd8111_usb2.c b/src/southbridge/amd/amd8111/amd8111_usb2.c index 0156b6ac2f..3aa5211dd0 100644 --- a/src/southbridge/amd/amd8111/amd8111_usb2.c +++ b/src/southbridge/amd/amd8111/amd8111_usb2.c @@ -26,7 +26,7 @@ static void amd8111_usb2_enable(device_t dev) // Due to buggy USB2 we force it to disable. dev->enabled = 0; amd8111_enable(dev); - printk_debug("USB2 disabled.\n"); + printk(BIOS_DEBUG, "USB2 disabled.\n"); } static struct device_operations usb2_ops = { -- cgit v1.2.3