From 650b6d0b61087d979f18f57b64ede4ff9d1c56f6 Mon Sep 17 00:00:00 2001
From: Stefan Reinauer <stepan@openbios.org>
Date: Wed, 24 Mar 2004 14:10:45 +0000
Subject: Further trimming freebios2 towards code reuse. Unified AMD K8 reset
 function that can be customized via mainboard Config.lb

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1471 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/southbridge/amd/amd8111/Config.lb       |  1 +
 src/southbridge/amd/amd8111/amd8111_reset.c | 45 +++++++++++++++++++++++++++++
 2 files changed, 46 insertions(+)
 create mode 100644 src/southbridge/amd/amd8111/amd8111_reset.c

(limited to 'src/southbridge/amd/amd8111')

diff --git a/src/southbridge/amd/amd8111/Config.lb b/src/southbridge/amd/amd8111/Config.lb
index 5bbbaba65e..57d299cfbf 100644
--- a/src/southbridge/amd/amd8111/Config.lb
+++ b/src/southbridge/amd/amd8111/Config.lb
@@ -8,3 +8,4 @@ driver amd8111_usb2.o
 driver amd8111_ac97.o
 driver amd8111_nic.o
 driver amd8111_pci.o
+object amd8111_reset.o
diff --git a/src/southbridge/amd/amd8111/amd8111_reset.c b/src/southbridge/amd/amd8111/amd8111_reset.c
new file mode 100644
index 0000000000..822a1e378f
--- /dev/null
+++ b/src/southbridge/amd/amd8111/amd8111_reset.c
@@ -0,0 +1,45 @@
+#include <arch/io.h>
+
+#define PCI_DEV(BUS, DEV, FN) ( \
+	(((BUS) & 0xFF) << 16) | \
+	(((DEV) & 0x1f) << 11) | \
+	(((FN)  & 0x7) << 8))
+
+#define AMD8111_RESET PCI_DEV(     \
+		HARD_RESET_BUS,    \
+		HARD_RESET_DEVICE, \
+		HARD_RESET_FUNCTION)
+
+typedef unsigned device_t;
+
+static void pci_write_config8(device_t dev, unsigned where, unsigned char value)
+{
+        unsigned addr;
+        addr = dev | where;
+        outl(0x80000000 | (addr & ~3), 0xCF8);
+        outb(value, 0xCFC + (addr & 3));
+}
+
+static void pci_write_config32(device_t dev, unsigned where, unsigned value)
+{
+	unsigned addr;
+        addr = dev | where;
+        outl(0x80000000 | (addr & ~3), 0xCF8);
+        outl(value, 0xCFC);
+}
+
+static unsigned pci_read_config32(device_t dev, unsigned where)
+{
+	unsigned addr;
+        addr = dev | where;
+        outl(0x80000000 | (addr & ~3), 0xCF8);
+        return inl(0xCFC);
+}
+
+#include "../../../northbridge/amd/amdk8/reset_test.c"
+
+void hard_reset(void)
+{
+	set_bios_reset();
+	pci_write_config8(AMD8111_RESET, 0x47, 1);
+}
-- 
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