From 9a791dffeae2097aa0a18f645ce07acfed41b9bc Mon Sep 17 00:00:00 2001 From: Yinghai Lu Date: Mon, 3 Apr 2006 20:38:34 +0000 Subject: new cache_as_ram support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/amd/amd8111/amd8111_early_ctrl.c | 53 +++++++++++++++++++----- 1 file changed, 42 insertions(+), 11 deletions(-) (limited to 'src/southbridge/amd/amd8111/amd8111_early_ctrl.c') diff --git a/src/southbridge/amd/amd8111/amd8111_early_ctrl.c b/src/southbridge/amd/amd8111/amd8111_early_ctrl.c index 8a648e8d37..9d40076bea 100644 --- a/src/southbridge/amd/amd8111/amd8111_early_ctrl.c +++ b/src/southbridge/amd/amd8111/amd8111_early_ctrl.c @@ -1,10 +1,31 @@ /* by yhlu 2005.10 */ -static void hard_reset(struct sys_info *sysinfo) +static unsigned get_sbdn(unsigned bus) { device_t dev; - - /* Find the device */ - dev = PCI_DEV(sysinfo->sbbusn, sysinfo->sbdn+1, 3); + + /* Find the device. + * There can only be one 8111 on a hypertransport chain/bus. + */ + dev = pci_locate_device_on_bus( + PCI_ID(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_PCI), + bus); + + return (dev>>15) & 0x1f; + +} + +static void hard_reset(void) +{ + device_t dev; + unsigned bus; + + /* Find the device. + * There can only be one 8111 on a hypertransport chain/bus. + */ + bus = get_sbbusn(get_sblk()); + dev = pci_locate_device_on_bus( + PCI_ID(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_ACPI), + bus); set_bios_reset(); @@ -14,11 +35,11 @@ static void hard_reset(struct sys_info *sysinfo) outb(0x0e, 0x0cf9); } -static void enable_fid_change_on_sb(struct sys_info *sysinfo) +static void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn) { device_t dev; - /* Find the device */ - dev = PCI_DEV(sysinfo->sbbusn, sysinfo->sbdn+1, 3); + + dev = PCI_DEV(sbbusn, sbdn+1, 3); // ACPI pci_write_config8(dev, 0x74, 4); @@ -27,15 +48,25 @@ static void enable_fid_change_on_sb(struct sys_info *sysinfo) } -static void soft_reset(struct sys_info *sysinfo) +static void soft_reset_x(unsigned sbbusn, unsigned sbdn) { device_t dev; - - /* Find the device */ - dev = PCI_DEV(sysinfo->sbbusn, sysinfo->sbdn+1, 0); + dev = PCI_DEV(sbbusn, sbdn+1, 0); //ISA + + /* Reset */ set_bios_reset(); pci_write_config8(dev, 0x47, 1); + } +static void soft_reset(void) +{ + unsigned sblk = get_sblk(); + unsigned sbbusn = get_sbbusn(sblk); + unsigned sbdn = get_sbdn(sbbusn); + + return soft_reset_x(sbbusn, sbdn); + +} -- cgit v1.2.3