From a96d24d672abfd2ce91caa2d762fdce3d67da600 Mon Sep 17 00:00:00 2001 From: Mike Loptien Date: Mon, 25 Feb 2013 10:41:28 -0700 Subject: AMD Southbridge: Add RTC init to lpc_init Adding RTC init code to the Southbridge initialization code in 'lpc_init'. This initializes the RTC so that the Date Alarm register is set to a valid value (0x00) at startup. By setting the Date Alarm register to 0x00, it does not get evaluated along with the seconds, minutes, and hours when running 'fwts s3'. Information about fwts (Firmware Test Suite) can be found here: https://wiki.ubuntu.com/Kernel/Reference/fwts This is the same edit made to the CIMX SB800 titled 'AMD/Persimmon: Add RTC init to CIMX SB800' with commit ID: c4d3d which can be viewed here: http://review.coreboot.org/#/c/2488/ Change-Id: Iddb7a3cbabe736b511cde03d7dc0a4a0b1c7fd90 Signed-off-by: Mike Loptien Reviewed-on: http://review.coreboot.org/2510 Reviewed-by: Martin Roth Reviewed-by: Stefan Reinauer Tested-by: build bot (Jenkins) Reviewed-by: Dave Frodin --- src/southbridge/amd/agesa/hudson/lpc.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/southbridge/amd/agesa/hudson') diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c index 86e937e569..aad4eb9efa 100644 --- a/src/southbridge/amd/agesa/hudson/lpc.c +++ b/src/southbridge/amd/agesa/hudson/lpc.c @@ -69,6 +69,13 @@ static void lpc_init(device_t dev) pci_write_config8(dev, 0xBB, byte); rtc_check_update_cmos_date(RTC_HAS_ALTCENTURY); + + /* Initialize the real time clock. + * The 0 argument tells rtc_init not to + * update CMOS unless it is invalid. + * 1 tells rtc_init to always initialize the CMOS. + */ + rtc_init(0); } static void hudson_lpc_read_resources(device_t dev) -- cgit v1.2.3