From 599d668cdd8438820d9ca8f54826163662b2a6f0 Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Thu, 17 Apr 2014 23:33:50 -0500 Subject: southbridge/hudson: Compile refactored SMI setup utilities in SMM Refactor hudson_enable_gevent_smi() to allow configuring the interrupt mode and trigger level. Move the utilities which are useful in SMM to a separate file that is included in both ramstage and SMM. This is useful for SMI handlers which need to enable or disable GEVENT SMIs on-the-fly. A follow-up patch makes use of this infrastructure. Change-Id: Ifa4c300c00c178b18d7280690cfc4b8367c669b8 Signed-off-by: Alexandru Gagniuc Reviewed-on: http://review.coreboot.org/170 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/southbridge/amd/agesa/hudson/smi.h | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) (limited to 'src/southbridge/amd/agesa/hudson/smi.h') diff --git a/src/southbridge/amd/agesa/hudson/smi.h b/src/southbridge/amd/agesa/hudson/smi.h index 7932228280..53da00adfa 100644 --- a/src/southbridge/amd/agesa/hudson/smi.h +++ b/src/southbridge/amd/agesa/hudson/smi.h @@ -22,11 +22,16 @@ #define SMI_REG_CONTROL0 0xa0 -enum smi_src_mode { - SMI_SRC_MODE_DISABLE = 0, - SMI_SRC_MODE_SMI = 1, - SMI_SRC_MODE_NMI = 2, - SMI_SRC_MODE_IRQ13 = 3, +enum smi_mode { + SMI_MODE_DISABLE = 0, + SMI_MODE_SMI = 1, + SMI_MODE_NMI = 2, + SMI_MODE_IRQ13 = 3, +}; + +enum smi_lvl { + SMI_LVL_LOW = 0, + SMI_LVL_HIGH = 1, }; static inline uint32_t smi_read32(uint8_t offset) @@ -49,10 +54,12 @@ static inline void smi_write16(uint8_t offset, uint16_t value) write16(SMI_BASE + offset, value); } +void hudson_configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level); +void hudson_disable_gevent_smi(uint8_t gevent); +void hudson_enable_acpi_cmd_smi(void); + #ifndef __SMM__ void hudson_enable_smi_generation(void); -void hudson_enable_gevent_smi(uint8_t gevent); -void hudson_enable_acpi_cmd_smi(void); #endif #endif /* _SOUTHBRIDGE_AMD_AGESA_HUDSON_SMI_H */ -- cgit v1.2.3