From d2e8f6ad33c750853844c5674d1a1a926ad7d93a Mon Sep 17 00:00:00 2001 From: Felix Held Date: Sun, 31 May 2015 20:28:17 +0200 Subject: southbridge/amd: add support for Bolton FCH The Bolton FCH needs different firmware files than the Hudson FCH. A small patch to vendorcode is probably needed to make the XHCI controller work. XHCI_DEVID in pci_devs.h is probably wrong for Hudson. Change-Id: Ib81c0881979edcde717217dc89d8af415520d7e5 Signed-off-by: Felix Held Reviewed-on: http://review.coreboot.org/9623 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/southbridge/amd/agesa/hudson/pci_devs.h | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'src/southbridge/amd/agesa/hudson/pci_devs.h') diff --git a/src/southbridge/amd/agesa/hudson/pci_devs.h b/src/southbridge/amd/agesa/hudson/pci_devs.h index b365c74bb0..d335fc2ec5 100644 --- a/src/southbridge/amd/agesa/hudson/pci_devs.h +++ b/src/southbridge/amd/agesa/hudson/pci_devs.h @@ -24,6 +24,13 @@ #define XHCI_DEVID 0x7814 #define XHCI_DEVFN PCI_DEVFN(XHCI_DEV,XHCI_FUNC) +#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_BOLTON) +#define XHCI2_DEV 0x10 +#define XHCI2_FUNC 1 +#define XHCI2_DEVID 0x7814 +#define XHCI2_DEVFN PCI_DEVFN(XHCI2_DEV,XHCI2_FUNC) +#endif + /* SATA */ #define SATA_DEV 0x11 #define SATA_FUNC 0 @@ -66,7 +73,7 @@ #define SMBUS_DEVFN PCI_DEVFN(SMBUS_DEV,SMBUS_FUNC) /* IDE */ -#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) +#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_BOLTON) || IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) #define IDE_DEV 0x14 #define IDE_FUNC 1 # define IDE_DEVID 0x780C @@ -99,7 +106,7 @@ #define SD_DEVFN PCI_DEVFN(SD_DEV,SD_FUNC) /* PCIe Ports */ -#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) +#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_BOLTON) || IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) #define SB_PCIE_DEV 0x15 #define SB_PCIE_PORT1_FUNC 0 #define SB_PCIE_PORT2_FUNC 1 -- cgit v1.2.3