From cd49cce7b70e80b4acc49b56bb2bb94370b4d867 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Tue, 5 Mar 2019 16:53:33 -0800 Subject: coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/southbridge/amd/agesa/hudson/acpi/fch.asl | 8 ++++---- src/southbridge/amd/agesa/hudson/acpi/usb.asl | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'src/southbridge/amd/agesa/hudson/acpi') diff --git a/src/southbridge/amd/agesa/hudson/acpi/fch.asl b/src/southbridge/amd/agesa/hudson/acpi/fch.asl index 83e3410ccb..825e35464e 100644 --- a/src/southbridge/amd/agesa/hudson/acpi/fch.asl +++ b/src/southbridge/amd/agesa/hudson/acpi/fch.asl @@ -58,7 +58,7 @@ Device(SDCN) { Name(_ADR, 0x00140007) } /* end SDCN */ -#if !IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) +#if !CONFIG(SOUTHBRIDGE_AMD_AGESA_YANGTZE) /* 0:14.4 - PCI slot 1, 2, 3 */ Device(PIBR) { @@ -146,7 +146,7 @@ Method(_CRS, 0) { Return(CRES) /* note to change the Name buffer */ } /* end of Method(_SB.PCI0._CRS) */ -#if IS_ENABLED(CONFIG_HUDSON_IMC_FWM) +#if CONFIG(HUDSON_IMC_FWM) #include "acpi/AmdImc.asl" /* Hudson IMC function */ #endif @@ -175,8 +175,8 @@ Method(_INI, 0) { /* Determine the OS we're running on */ OSFL() -#if IS_ENABLED(CONFIG_HUDSON_IMC_FWM) -#if IS_ENABLED(CONFIG_ACPI_ENABLE_THERMAL_ZONE) +#if CONFIG(HUDSON_IMC_FWM) +#if CONFIG(ACPI_ENABLE_THERMAL_ZONE) ITZE() /* enable IMC Fan Control*/ #endif #endif diff --git a/src/southbridge/amd/agesa/hudson/acpi/usb.asl b/src/southbridge/amd/agesa/hudson/acpi/usb.asl index d83b935ffa..cc07565795 100644 --- a/src/southbridge/amd/agesa/hudson/acpi/usb.asl +++ b/src/southbridge/amd/agesa/hudson/acpi/usb.asl @@ -50,7 +50,7 @@ Device(UOH6) { Name(_PRW, Package() {0x0B, 3}) } /* end UOH5 */ -#if !IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) +#if !CONFIG(SOUTHBRIDGE_AMD_AGESA_YANGTZE) /* 0:14.5 - OHCI */ Device(UEH1) { Name(_ADR, 0x00140005) @@ -64,7 +64,7 @@ Device(XHC0) { Name(_PRW, Package() {0x0B, 4}) } /* end XHC0 */ -#if !IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) +#if !CONFIG(SOUTHBRIDGE_AMD_AGESA_YANGTZE) /* 0:10.1 - XHCI 1*/ Device(XHC1) { Name(_ADR, 0x00100001) -- cgit v1.2.3