From fe14d96b80c44f51d2b85e057d051fdb0935f389 Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Wed, 31 Jul 2024 20:40:30 +0100 Subject: soc/intel/cnvw: Add GPEH Method Add a general purpose handle to allow CNVi to be notified of state changes. Intel document #559910 details this. Change-Id: I36c98c525c99fb2b7b5ebd8b0e392e6626e97290 Signed-off-by: Sean Rhodes Reviewed-on: https://review.coreboot.org/c/coreboot/+/83710 Reviewed-by: Nicholas Sudsgaard Tested-by: build bot (Jenkins) --- src/soc/intel/common/block/cnvi/cnvi.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'src/soc') diff --git a/src/soc/intel/common/block/cnvi/cnvi.c b/src/soc/intel/common/block/cnvi/cnvi.c index 9759b542af..fcfb03fd1b 100644 --- a/src/soc/intel/common/block/cnvi/cnvi.c +++ b/src/soc/intel/common/block/cnvi/cnvi.c @@ -287,6 +287,35 @@ static void cnvw_fill_ssdt(const struct device *dev) } acpigen_pop_len(); +/* + * Method (GPEH, 0, NotSerialized) + * { + * If ((VDID == 0xFFFFFFFF)) + * { + * Return (Zero) + * } + * If ((PMES == One)) + * { + * Notify (CNVW, 0x02) // Device Wake + * } + * } + */ + acpigen_write_method("GPEH", 0); + { + acpigen_write_if_lequal_namestr_int("VDID", 0xffffffff); + { + acpigen_write_return_integer(0); + } + acpigen_pop_len(); + + acpigen_write_if_lequal_namestr_int("PMES", 1); + { + acpigen_notify("CNVW", 2); + } + acpigen_pop_len(); + } + acpigen_pop_len(); + acpigen_write_scope_end(); } -- cgit v1.2.3