From fd277d8f9406c746ed929a042e01afd31022b605 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Mon, 11 Jan 2016 12:47:30 -0700 Subject: header files: Fix guard name comments to match guard names This just updates existing guard name comments on the header files to match the actual #define name. As a side effect, if there was no newline at the end of these files, one was added. Change-Id: Ia2cd8057f2b1ceb0fa1b946e85e0c16a327a04d7 Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/12900 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/broadcom/cygnus/include/soc/ddr_bist.h | 2 +- src/soc/broadcom/cygnus/include/soc/shmoo_and28/phy_and28_e2.h | 2 +- src/soc/broadcom/cygnus/include/soc/shmoo_and28/ydc_ddr_bist.h | 2 +- src/soc/nvidia/tegra132/include/soc/id.h | 2 +- src/soc/nvidia/tegra210/include/soc/id.h | 2 +- src/soc/qualcomm/ipq806x/include/soc/clock.h | 2 +- src/soc/qualcomm/ipq806x/include/soc/spi.h | 2 +- src/soc/samsung/exynos5250/include/soc/cpu.h | 2 +- src/soc/samsung/exynos5420/include/soc/cpu.h | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) (limited to 'src/soc') diff --git a/src/soc/broadcom/cygnus/include/soc/ddr_bist.h b/src/soc/broadcom/cygnus/include/soc/ddr_bist.h index 007a80aa48..bce52226ac 100755 --- a/src/soc/broadcom/cygnus/include/soc/ddr_bist.h +++ b/src/soc/broadcom/cygnus/include/soc/ddr_bist.h @@ -154,6 +154,6 @@ enum drc_reg_set { #define DRC_REG_WRITE(unit, channel, reg, rv) \ soc_reg32_set((volatile uint32*)(channel + 4 * reg), rv) -#endif /* #ifndef __SOC_BROADCOM_CYGNUS_DDR_BIST_H__*/ +#endif /* __SOC_BROADCOM_CYGNUS_DDR_BIST_H__ */ /* End of File */ diff --git a/src/soc/broadcom/cygnus/include/soc/shmoo_and28/phy_and28_e2.h b/src/soc/broadcom/cygnus/include/soc/shmoo_and28/phy_and28_e2.h index e9eec9ab4c..166cc0bb86 100755 --- a/src/soc/broadcom/cygnus/include/soc/shmoo_and28/phy_and28_e2.h +++ b/src/soc/broadcom/cygnus/include/soc/shmoo_and28/phy_and28_e2.h @@ -11266,6 +11266,6 @@ #define DDR34_CORE_PHY_BYTE_LANE_1_BL_SPARE_REG_reserved_for_eco0_SHIFT 0 #define DDR34_CORE_PHY_BYTE_LANE_1_BL_SPARE_REG_reserved_for_eco0_DEFAULT 0x00000000 -#endif /* #ifndef __SOC_BROADCOM_CYGNUS_PHY_AND28_E2_H__ */ +#endif /* __SOC_BROADCOM_CYGNUS_PHY_AND28_E2_H__ */ /* End of File */ diff --git a/src/soc/broadcom/cygnus/include/soc/shmoo_and28/ydc_ddr_bist.h b/src/soc/broadcom/cygnus/include/soc/shmoo_and28/ydc_ddr_bist.h index 0efd3ac5e9..97fba1740c 100755 --- a/src/soc/broadcom/cygnus/include/soc/shmoo_and28/ydc_ddr_bist.h +++ b/src/soc/broadcom/cygnus/include/soc/shmoo_and28/ydc_ddr_bist.h @@ -1145,6 +1145,6 @@ extern int soc_ydc_ddr_bist_run(int unit, int phy_ndx, /**************************************************************************** * Datatype Definitions. ***************************************************************************/ -#endif /* #ifndef __SOC_BROADCOM_CYGNUS_YDC_DDR_BIST_H__ */ +#endif /* __SOC_BROADCOM_CYGNUS_YDC_DDR_BIST_H__ */ /* End of File */ diff --git a/src/soc/nvidia/tegra132/include/soc/id.h b/src/soc/nvidia/tegra132/include/soc/id.h index 198e3c4fdd..907285614c 100644 --- a/src/soc/nvidia/tegra132/include/soc/id.h +++ b/src/soc/nvidia/tegra132/include/soc/id.h @@ -28,4 +28,4 @@ static inline int context_avp(void) return read32(uptag) == avp_id; } -#endif /* define __SOC_NVIDIA_TEGRA132_INCLUDE_SOC_ID_H__ */ +#endif /* __SOC_NVIDIA_TEGRA132_INCLUDE_SOC_ID_H__ */ diff --git a/src/soc/nvidia/tegra210/include/soc/id.h b/src/soc/nvidia/tegra210/include/soc/id.h index 5e487d2d6b..0903ba98ef 100644 --- a/src/soc/nvidia/tegra210/include/soc/id.h +++ b/src/soc/nvidia/tegra210/include/soc/id.h @@ -28,4 +28,4 @@ static inline int context_avp(void) return read32(uptag) == avp_id; } -#endif /* define __SOC_NVIDIA_TEGRA210_INCLUDE_SOC_ID_H__ */ +#endif /* __SOC_NVIDIA_TEGRA210_INCLUDE_SOC_ID_H__ */ diff --git a/src/soc/qualcomm/ipq806x/include/soc/clock.h b/src/soc/qualcomm/ipq806x/include/soc/clock.h index ab50d3f32f..482deadfe7 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/clock.h +++ b/src/soc/qualcomm/ipq806x/include/soc/clock.h @@ -194,4 +194,4 @@ void nand_clock_config(void); void usb_clock_config(void); int audio_clock_config(unsigned frequency); -#endif /* __PLATFORM_IPQ860X_CLOCK_H_ */ +#endif /* __IPQ860X_CLOCK_H_ */ diff --git a/src/soc/qualcomm/ipq806x/include/soc/spi.h b/src/soc/qualcomm/ipq806x/include/soc/spi.h index 6d816daf5e..3e623463cc 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/spi.h +++ b/src/soc/qualcomm/ipq806x/include/soc/spi.h @@ -276,4 +276,4 @@ static inline struct ipq_spi_slave *to_ipq_spi(struct spi_slave *slave) return container_of(slave, struct ipq_spi_slave, slave); } -#endif /* _IPQ_SPI_H_ */ +#endif /* _IPQ806X_SPI_H_ */ diff --git a/src/soc/samsung/exynos5250/include/soc/cpu.h b/src/soc/samsung/exynos5250/include/soc/cpu.h index 3ee3d13540..24bb96ffe2 100644 --- a/src/soc/samsung/exynos5250/include/soc/cpu.h +++ b/src/soc/samsung/exynos5250/include/soc/cpu.h @@ -81,4 +81,4 @@ static inline u32 get_fb_base_kb(void) return RAM_BASE_KB + RAM_SIZE_KB - FB_SIZE_KB; } -#endif /* _EXYNOS5250_CPU_H */ +#endif /* CPU_SAMSUNG_EXYNOS5250_CPU_H */ diff --git a/src/soc/samsung/exynos5420/include/soc/cpu.h b/src/soc/samsung/exynos5420/include/soc/cpu.h index f268a5c476..f523b4104d 100644 --- a/src/soc/samsung/exynos5420/include/soc/cpu.h +++ b/src/soc/samsung/exynos5420/include/soc/cpu.h @@ -92,4 +92,4 @@ static inline u32 get_fb_base_kb(void) /* Procedures to setup Exynos5420 CPU */ void exynos5420_config_smp(void); -#endif /* _EXYNOS5420_CPU_H */ +#endif /* CPU_SAMSUNG_EXYNOS5420_CPU_H */ -- cgit v1.2.3