From fa5f9b5aff2279d6304a8b197e12714934025575 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 19 Jan 2021 14:12:19 +0200 Subject: ACPI: Declare GNVS variables globally MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There is a common place where acpigen generates these, so the declarations for the OperationRegions should be centralized too. Change-Id: I772492ca9e651b60244c565d1e926dc2ad33cfd8 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/49795 Reviewed-by: Raul Rangel Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/soc/amd/picasso/acpi/globalnvs.asl | 3 --- src/soc/amd/stoneyridge/acpi/globalnvs.asl | 3 --- src/soc/intel/apollolake/acpi/globalnvs.asl | 3 --- src/soc/intel/baytrail/acpi/device_nvs.asl | 3 --- src/soc/intel/baytrail/acpi/globalnvs.asl | 10 ---------- src/soc/intel/braswell/acpi/device_nvs.asl | 3 --- src/soc/intel/braswell/acpi/globalnvs.asl | 10 ---------- src/soc/intel/broadwell/acpi/device_nvs.asl | 3 --- src/soc/intel/broadwell/pch/acpi/globalnvs.asl | 9 --------- src/soc/intel/common/block/acpi/acpi/globalnvs.asl | 10 ---------- src/soc/intel/denverton_ns/acpi/globalnvs.asl | 9 --------- src/soc/intel/skylake/acpi/globalnvs.asl | 10 ---------- 12 files changed, 76 deletions(-) (limited to 'src/soc') diff --git a/src/soc/amd/picasso/acpi/globalnvs.asl b/src/soc/amd/picasso/acpi/globalnvs.asl index 1c19059425..4b0e774755 100644 --- a/src/soc/amd/picasso/acpi/globalnvs.asl +++ b/src/soc/amd/picasso/acpi/globalnvs.asl @@ -9,9 +9,6 @@ Name (PICM, Zero) /* Interrupt Mode used by OS. Assume PIC. */ * */ -External (NVSA) - -OperationRegion (GNVS, SystemMemory, NVSA, 0x1000) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/soc/amd/stoneyridge/acpi/globalnvs.asl b/src/soc/amd/stoneyridge/acpi/globalnvs.asl index 8bfc7b2b80..252ceda911 100644 --- a/src/soc/amd/stoneyridge/acpi/globalnvs.asl +++ b/src/soc/amd/stoneyridge/acpi/globalnvs.asl @@ -6,9 +6,6 @@ * */ -External (NVSA) - -OperationRegion (GNVS, SystemMemory, NVSA, 0x1000) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/soc/intel/apollolake/acpi/globalnvs.asl b/src/soc/intel/apollolake/acpi/globalnvs.asl index 97677ad02e..07853defe3 100644 --- a/src/soc/intel/apollolake/acpi/globalnvs.asl +++ b/src/soc/intel/apollolake/acpi/globalnvs.asl @@ -6,9 +6,6 @@ * */ -External (NVSA) - -OperationRegion (GNVS, SystemMemory, NVSA, 0x1000) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/soc/intel/baytrail/acpi/device_nvs.asl b/src/soc/intel/baytrail/acpi/device_nvs.asl index aa0e9533f8..d570788985 100644 --- a/src/soc/intel/baytrail/acpi/device_nvs.asl +++ b/src/soc/intel/baytrail/acpi/device_nvs.asl @@ -1,8 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -External (NVSD) - -OperationRegion (DNVS, SystemMemory, NVSD, 0x1000) Field (DNVS, ByteAcc, NoLock, Preserve) { /* Device Enabled in ACPI Mode */ diff --git a/src/soc/intel/baytrail/acpi/globalnvs.asl b/src/soc/intel/baytrail/acpi/globalnvs.asl index 293daa94a3..eb51cada51 100644 --- a/src/soc/intel/baytrail/acpi/globalnvs.asl +++ b/src/soc/intel/baytrail/acpi/globalnvs.asl @@ -4,16 +4,6 @@ Name(\PICM, 0) /* IOAPIC/8259 */ -/* - * Global ACPI memory region. This region is used for passing information - * between coreboot (aka "the system bios"), ACPI, and the SMI handler. - * Since we don't know where this will end up in memory at ACPI compile time, - * we have to fix it up in coreboot's ACPI creation phase. - */ - -External (NVSA) - -OperationRegion (GNVS, SystemMemory, NVSA, 0x1000) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/soc/intel/braswell/acpi/device_nvs.asl b/src/soc/intel/braswell/acpi/device_nvs.asl index aa0e9533f8..d570788985 100644 --- a/src/soc/intel/braswell/acpi/device_nvs.asl +++ b/src/soc/intel/braswell/acpi/device_nvs.asl @@ -1,8 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -External (NVSD) - -OperationRegion (DNVS, SystemMemory, NVSD, 0x1000) Field (DNVS, ByteAcc, NoLock, Preserve) { /* Device Enabled in ACPI Mode */ diff --git a/src/soc/intel/braswell/acpi/globalnvs.asl b/src/soc/intel/braswell/acpi/globalnvs.asl index 6aa595713b..628a79190a 100644 --- a/src/soc/intel/braswell/acpi/globalnvs.asl +++ b/src/soc/intel/braswell/acpi/globalnvs.asl @@ -4,16 +4,6 @@ Name(\PICM, 0) /* IOAPIC/8259 */ -/* - * Global ACPI memory region. This region is used for passing information - * between coreboot (aka "the system bios"), ACPI, and the SMI handler. - * Since we don't know where this will end up in memory at ACPI compile time, - * we have to fix it up in coreboot's ACPI creation phase. - */ - -External (NVSA) - -OperationRegion (GNVS, SystemMemory, NVSA, 0x1000) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/soc/intel/broadwell/acpi/device_nvs.asl b/src/soc/intel/broadwell/acpi/device_nvs.asl index 30bb5b5cd0..fb95df8e6e 100644 --- a/src/soc/intel/broadwell/acpi/device_nvs.asl +++ b/src/soc/intel/broadwell/acpi/device_nvs.asl @@ -1,8 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -External (NVSD) - -OperationRegion (DNVS, SystemMemory, NVSD, 0x1000) Field (DNVS, ByteAcc, NoLock, Preserve) { /* Device enables in ACPI mode */ diff --git a/src/soc/intel/broadwell/pch/acpi/globalnvs.asl b/src/soc/intel/broadwell/pch/acpi/globalnvs.asl index 88fe4b1218..60d5737165 100644 --- a/src/soc/intel/broadwell/pch/acpi/globalnvs.asl +++ b/src/soc/intel/broadwell/pch/acpi/globalnvs.asl @@ -4,15 +4,6 @@ Name (\PICM, 0) // IOAPIC/8259 -/* - * Global ACPI memory region. This region is used for passing information - * between coreboot (aka "the system bios"), ACPI, and the SMI handler. - * Since we don't know where this will end up in memory at ACPI compile time, - * we have to fix it up in coreboot's ACPI creation phase. - */ - -External (NVSA) -OperationRegion (GNVS, SystemMemory, NVSA, 0x1000) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl index 6a6970f0a0..d508544cb0 100644 --- a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl +++ b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl @@ -4,16 +4,6 @@ Name (\PICM, 0) // IOAPIC/8259 -/* - * Global ACPI memory region. This region is used for passing information - * between coreboot (aka "the system bios"), ACPI, and the SMI handler. - * Since we don't know where this will end up in memory at ACPI compile time, - * we have to fix it up in coreboot's ACPI creation phase. - */ - -External (NVSA) - -OperationRegion (GNVS, SystemMemory, NVSA, 0x1000) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/soc/intel/denverton_ns/acpi/globalnvs.asl b/src/soc/intel/denverton_ns/acpi/globalnvs.asl index 97fa02f4a2..659129f550 100644 --- a/src/soc/intel/denverton_ns/acpi/globalnvs.asl +++ b/src/soc/intel/denverton_ns/acpi/globalnvs.asl @@ -4,15 +4,6 @@ Name(\PICM, 0) // IOAPIC/8259 -/* Global ACPI memory region. This region is used for passing information - * between coreboot (aka "the system bios"), ACPI, and the SMI handler. - * Since we don't know where this will end up in memory at ACPI compile time, - * we have to fix it up in coreboot's ACPI creation phase. - */ - - -External(NVSA) -OperationRegion (GNVS, SystemMemory, NVSA, 0x100) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/soc/intel/skylake/acpi/globalnvs.asl b/src/soc/intel/skylake/acpi/globalnvs.asl index 928c5e6eac..45c784e18d 100644 --- a/src/soc/intel/skylake/acpi/globalnvs.asl +++ b/src/soc/intel/skylake/acpi/globalnvs.asl @@ -4,16 +4,6 @@ Name (\PICM, 0) // IOAPIC/8259 -/* - * Global ACPI memory region. This region is used for passing information - * between coreboot (aka "the system bios"), ACPI, and the SMI handler. - * Since we don't know where this will end up in memory at ACPI compile time, - * we have to fix it up in coreboot's ACPI creation phase. - */ - -External (NVSA) - -OperationRegion (GNVS, SystemMemory, NVSA, 0x1000) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ -- cgit v1.2.3