From f0c67127a90862de46625880e0d05b3c63081359 Mon Sep 17 00:00:00 2001
From: Felix Held <felix-coreboot@felixheld.de>
Date: Thu, 14 Dec 2023 18:52:40 +0100
Subject: soc/amd/genoa/fch: add fch_init_acpi_ports

Make sure that the APMC SMI command IO port is configured to what
coreboot expects and enable the SMI generation for the APMC SMI command
port.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ie4fc259dea125a16556a01b80a3d5e6fb476044a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79531
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
---
 src/soc/amd/genoa/fch.c | 8 ++++++++
 1 file changed, 8 insertions(+)

(limited to 'src/soc')

diff --git a/src/soc/amd/genoa/fch.c b/src/soc/amd/genoa/fch.c
index f93408714b..c9779571da 100644
--- a/src/soc/amd/genoa/fch.c
+++ b/src/soc/amd/genoa/fch.c
@@ -74,9 +74,17 @@ static void set_pci_irqs(void)
 	/* TODO: PIRQ configuration */
 }
 
+static void fch_init_acpi_ports(void)
+{
+	/* Configure and enable APMC SMI Command Port */
+	pm_write16(PM_ACPI_SMI_CMD, APM_CNT);
+	configure_smi(SMITYPE_SMI_CMD_PORT, SMI_MODE_SMI);
+}
+
 static void fch_init(void *unused)
 {
 	set_pci_irqs();
+	fch_init_acpi_ports();
 }
 
 /*
-- 
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