From edac4ef6d4c25414bc0e6200875d57fff9e3346e Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Fri, 9 Oct 2020 08:50:14 -0700 Subject: mb, soc/intel: Reorganize CNVi device entries in devicetree This change reorganizes the CNVi device entries in mainboard devicetree/overridetree and SoC chipset tree to make it consistent with how other SoC internal PCI devices are represented i.e. without a chip driver around the SoC controller itself. Before: chip drivers/wifi/generic register "wake" = "..." device pci xx.y on end end After: device pci xx.y on chip drivers/wifi/generic register "wake" = "..." device generic 0 on end end end Change-Id: I22660047a3afd5994400341de0ca461bbc0634e2 Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/c/coreboot/+/46865 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie --- src/soc/intel/tigerlake/chipset.cb | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/tigerlake/chipset.cb b/src/soc/intel/tigerlake/chipset.cb index 1daa64bb3d..54f7924b37 100644 --- a/src/soc/intel/tigerlake/chipset.cb +++ b/src/soc/intel/tigerlake/chipset.cb @@ -112,9 +112,7 @@ chip soc/intel/tigerlake end device pci 14.1 alias south_xdci off end device pci 14.2 alias shared_ram off end - chip drivers/wifi/generic - device pci 14.3 alias cnvi_wifi off end - end + device pci 14.3 alias cnvi_wifi off end device pci 15.0 alias i2c0 off end device pci 15.1 alias i2c1 off end device pci 15.2 alias i2c2 off end -- cgit v1.2.3