From e8a21e7a623a99ef067b45e6fe5316f83068524d Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 21 Apr 2023 16:12:22 +0200 Subject: soc/amd/*/include/pci_devs: fix copy-paste error in PCIE_ABC_C_DEVFN Since it's an internal bus, it's PCIE_ABC_C_DEVFN and not PCIE_GPP_C_DEVFN. This also makes it consistent with the rest of the internal PCI buses. Signed-off-by: Felix Held Change-Id: Ica8b666161c3cd3b0b4a29f8a4b0aff473b4d833 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74656 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth Reviewed-by: Karthik Ramasubramanian Reviewed-by: Fred Reitberger --- src/soc/amd/cezanne/include/soc/pci_devs.h | 2 +- src/soc/amd/glinda/include/soc/pci_devs.h | 2 +- src/soc/amd/glinda/xhci.c | 2 +- src/soc/amd/mendocino/include/soc/pci_devs.h | 2 +- src/soc/amd/mendocino/xhci.c | 2 +- src/soc/amd/phoenix/include/soc/pci_devs.h | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) (limited to 'src/soc') diff --git a/src/soc/amd/cezanne/include/soc/pci_devs.h b/src/soc/amd/cezanne/include/soc/pci_devs.h index 8f5793bbb9..2337e0c6cf 100644 --- a/src/soc/amd/cezanne/include/soc/pci_devs.h +++ b/src/soc/amd/cezanne/include/soc/pci_devs.h @@ -108,7 +108,7 @@ #define SATA1_DEVFN PCI_DEVFN(SATA1_DEV, SATA1_FUNC) #define PCIE_ABC_C_FUNC 3 -#define PCIE_GPP_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) +#define PCIE_ABC_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) #define SOC_PCIE_GPP_C_DEV _SOC_DEV(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) /* SMBUS */ diff --git a/src/soc/amd/glinda/include/soc/pci_devs.h b/src/soc/amd/glinda/include/soc/pci_devs.h index 4e0bf9dcb2..a37d3eeb14 100644 --- a/src/soc/amd/glinda/include/soc/pci_devs.h +++ b/src/soc/amd/glinda/include/soc/pci_devs.h @@ -86,7 +86,7 @@ #define SOC_PCIE_GPP_B_DEV _SOC_DEV(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_B_FUNC) #define PCIE_ABC_C_FUNC 3 -#define PCIE_GPP_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) +#define PCIE_ABC_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) #define SOC_PCIE_GPP_C_DEV _SOC_DEV(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) #define XHCI2_DEV 0x0 diff --git a/src/soc/amd/glinda/xhci.c b/src/soc/amd/glinda/xhci.c index 78ca94ff4d..dad559334d 100644 --- a/src/soc/amd/glinda/xhci.c +++ b/src/soc/amd/glinda/xhci.c @@ -48,7 +48,7 @@ enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe) *gpe = xhci_sci_sources[1].gpe; return CB_SUCCESS; } - } else if (dev->bus->dev->path.pci.devfn == PCIE_GPP_C_DEVFN) { + } else if (dev->bus->dev->path.pci.devfn == PCIE_ABC_C_DEVFN) { if (dev->path.pci.devfn == XHCI2_DEVFN && dev->device == PCI_DID_AMD_FAM17H_MODELA0H_XHCI2) { *gpe = xhci_sci_sources[2].gpe; diff --git a/src/soc/amd/mendocino/include/soc/pci_devs.h b/src/soc/amd/mendocino/include/soc/pci_devs.h index 14c8300891..2c81a5bcb7 100644 --- a/src/soc/amd/mendocino/include/soc/pci_devs.h +++ b/src/soc/amd/mendocino/include/soc/pci_devs.h @@ -84,7 +84,7 @@ #define SOC_PCIE_GPP_B_DEV _SOC_DEV(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_B_FUNC) #define PCIE_ABC_C_FUNC 3 -#define PCIE_GPP_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) +#define PCIE_ABC_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) #define SOC_PCIE_GPP_C_DEV _SOC_DEV(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) #define XHCI2_DEV 0x0 diff --git a/src/soc/amd/mendocino/xhci.c b/src/soc/amd/mendocino/xhci.c index 720cc765ad..e5649911f4 100644 --- a/src/soc/amd/mendocino/xhci.c +++ b/src/soc/amd/mendocino/xhci.c @@ -49,7 +49,7 @@ enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe) *gpe = xhci_sci_sources[1].gpe; return CB_SUCCESS; } - } else if (dev->bus->dev->path.pci.devfn == PCIE_GPP_C_DEVFN) { + } else if (dev->bus->dev->path.pci.devfn == PCIE_ABC_C_DEVFN) { if (dev->path.pci.devfn == XHCI2_DEVFN && dev->device == PCI_DID_AMD_FAM17H_MODELA0H_XHCI2) { *gpe = xhci_sci_sources[2].gpe; diff --git a/src/soc/amd/phoenix/include/soc/pci_devs.h b/src/soc/amd/phoenix/include/soc/pci_devs.h index 0dde0ba431..cd7ad08f64 100644 --- a/src/soc/amd/phoenix/include/soc/pci_devs.h +++ b/src/soc/amd/phoenix/include/soc/pci_devs.h @@ -104,7 +104,7 @@ #define GFX_IPU_DEVFN PCI_DEVFN(GFX_IPU_DEV, GFX_IPU_FUNC) #define PCIE_ABC_C_FUNC 3 -#define PCIE_GPP_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) +#define PCIE_ABC_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) #define SOC_PCIE_GPP_C_DEV _SOC_DEV(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) #define USB4_XHCI0_DEV 0x0 -- cgit v1.2.3