From e44fe6a39effe9a227fee193a03c616075d5d462 Mon Sep 17 00:00:00 2001 From: Jincheng Li Date: Tue, 25 Jun 2024 15:24:59 +0800 Subject: soc/intel/xeon_sp/gnr: Add dimm_slot configuration Add sample DIMM slot configuration table for avenuecity CRB and beechnutcity CRB. This table will be used to fill SMBIOS type 17 table. TEST=Boot on intel/avenuecity CRB It will help to update Locator, Bank Locator and Asset Tag with the value described in dimm_slot_config_table Change-Id: I53556c02eb75204994a1bcb42eccb940e83bd532 Signed-off-by: Jincheng Li Signed-off-by: Shuo Liu Reviewed-on: https://review.coreboot.org/c/coreboot/+/83326 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/soc/intel/xeon_sp/gnr/include/soc/dimm_slot.h | 28 +++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 src/soc/intel/xeon_sp/gnr/include/soc/dimm_slot.h (limited to 'src/soc') diff --git a/src/soc/intel/xeon_sp/gnr/include/soc/dimm_slot.h b/src/soc/intel/xeon_sp/gnr/include/soc/dimm_slot.h new file mode 100644 index 0000000000..41e9efb997 --- /dev/null +++ b/src/soc/intel/xeon_sp/gnr/include/soc/dimm_slot.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef _SOC_DIMM_SLOT_H_ +#define _SOC_DIMM_SLOT_H_ + +#include + +struct dimm_slot_config { + uint8_t socket; + uint8_t channel; + uint8_t dimm; + /* + * Refer to DSP0134_3.6.0.pdf + * page 103 'Device Locator', 'Bank Locator' and 'Asset Tag'. + */ + const char *dev_locator; + const char *bank_locator; + const char *asset_tag; +}; + +#define DIMM_SLOT_EQUAL(dimm_slot, s, c, d) (\ + (dimm_slot.socket == s) &&\ + (dimm_slot.channel == c) &&\ + (dimm_slot.dimm == d)) + +const struct dimm_slot_config *get_dimm_slot_config_table(int *size); + +#endif /* _SOC_DIMM_SLOT_H_ */ -- cgit v1.2.3