From e27e1c1c6389e0a4d87c97dfef14068bfc7ddde6 Mon Sep 17 00:00:00 2001 From: Tim Chu Date: Wed, 19 Oct 2022 06:24:21 +0000 Subject: soc/intel/xeon_sp: Add functions to store/restore uart state in smm When CONFIG_DEBUG_SMI is enabled SMM handler performs console hardware initialization that may interfere with OS. Here we store the state before console initialization and restore state before SMM exit. Tested=On not public yet system, after exiting smm, uart console can still work well. Signed-off-by: Tim Chu Change-Id: Ifa5042c24f0e3217a75971d9e6067b1d1f56a484 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68567 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Zhang --- src/soc/intel/xeon_sp/smihandler.c | 43 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) (limited to 'src/soc') diff --git a/src/soc/intel/xeon_sp/smihandler.c b/src/soc/intel/xeon_sp/smihandler.c index 1c04b95d73..d644447aee 100644 --- a/src/soc/intel/xeon_sp/smihandler.c +++ b/src/soc/intel/xeon_sp/smihandler.c @@ -1,12 +1,55 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include +#include #include #include +#include #include #include #include +struct uart8250_state { + uint8_t IER, IIR, MCR, LCR, DLL, DLM; +}; + +static struct uart8250_state s_uart8250_state; + +static void uart8250_store(unsigned int base_port) +{ + /* Save previous state for restoring later. */ + s_uart8250_state.IER = inb(base_port + UART8250_IER); + s_uart8250_state.IIR = inb(base_port + UART8250_FCR); + s_uart8250_state.MCR = inb(base_port + UART8250_MCR); + s_uart8250_state.LCR = inb(base_port + UART8250_LCR); + s_uart8250_state.DLL = inb(base_port + UART8250_DLL); + s_uart8250_state.DLM = inb(base_port + UART8250_DLM); +} + +void smm_soc_early_init(void) +{ + if (CONFIG(DRIVERS_UART_8250IO) && CONFIG(DEBUG_SMI)) + uart8250_store(uart_platform_base(CONFIG_UART_FOR_CONSOLE)); +} + +static void uart8250_restore(unsigned int base_port) +{ + outb(s_uart8250_state.DLL, base_port + UART8250_DLL); + outb(s_uart8250_state.DLM, base_port + UART8250_DLM); + outb(s_uart8250_state.MCR, base_port + UART8250_MCR); + outb(s_uart8250_state.LCR, base_port + UART8250_LCR); + if ((s_uart8250_state.IIR & UART8250_IIR_FIFO_EN) == UART8250_IIR_FIFO_EN) + outb(UART8250_FCR_FIFO_EN, base_port + UART8250_FCR); + outb(s_uart8250_state.IER, base_port + UART8250_IER); +} + +void smm_soc_exit(void) +{ + if (CONFIG(DRIVERS_UART_8250IO) && CONFIG(DEBUG_SMI)) + uart8250_restore(uart_platform_base(CONFIG_UART_FOR_CONSOLE)); +} + /* * Specific SOC SMI handler during ramstage finalize phase */ -- cgit v1.2.3