From e2271dc0de7e3ad299ade88d214e377a91ab0bc3 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Wed, 3 Apr 2024 09:32:29 +0200 Subject: soc/intel/xeon_sp: Compress FSP-S Compress FSP-S to save some space in CBFS. Reduces the size of debug FSP-S by about 25%. Test: Still boots on ibm/sbp1. TEST= Build and boot on intel/archercity CRB. Change-Id: I6248e7cabbce45f6c2fedfab34f328309f87e868 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/81634 Reviewed-by: Shuo Liu Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Arthur Heymans --- src/soc/intel/xeon_sp/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc') diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index 51f407ef3a..45c7d9d25b 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -15,6 +15,7 @@ config XEON_SP_COMMON_BASE select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select FSP_CAR select FSP_M_XIP + select FSP_COMPRESS_FSP_S_LZ4 select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS select FSP_T_XIP select HAVE_SMI_HANDLER -- cgit v1.2.3