From e166cb38bf8f01944bff435b5fef79f9f0b7a50d Mon Sep 17 00:00:00 2001 From: Benjamin Doron Date: Tue, 5 Jan 2021 19:42:46 +0000 Subject: soc/intel/skylake/acpi: Add PEP table MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PEP table is applicable to Skylake platform as well. It is required to make the kernel load `intel_pmc_core`. Skylake boards can also use S0ix hooks. Tested on an out-of-tree Acer Aspire VN7-572G (Skylake-U), intel_pmc_core kernel module is loaded and reports statuses predictably via debugfs. Change-Id: I08d8c1fde4f447e9292a0508649f802fdc2721e1 Signed-off-by: Benjamin Doron Reviewed-on: https://review.coreboot.org/c/coreboot/+/49140 Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) --- src/soc/intel/skylake/acpi/pch.asl | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc') diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl index 02e30f770f..9c3385f9ab 100644 --- a/src/soc/intel/skylake/acpi/pch.asl +++ b/src/soc/intel/skylake/acpi/pch.asl @@ -68,3 +68,6 @@ Method (_OSC, 4) /* Integrated graphics 0:2.0 */ #include + +/* Intel Power Engine Plug-in */ +#include -- cgit v1.2.3