From dd597627295e0063e29ba43a0b2d6fdefb12c2c6 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sun, 26 Apr 2020 19:46:35 +0200 Subject: intel/gma: Only enable bus mastering if we are going to use it Also fix wrong 32-bit writes. Change-Id: Ib038f0cd558223536da08ba2264774db11cd8357 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/coreboot/+/40727 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/soc/intel/broadwell/igd.c | 8 +++----- src/soc/intel/common/block/graphics/graphics.c | 6 ++---- 2 files changed, 5 insertions(+), 9 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c index 0f83937a77..41167b1cf9 100644 --- a/src/soc/intel/broadwell/igd.c +++ b/src/soc/intel/broadwell/igd.c @@ -496,15 +496,13 @@ static void igd_init(struct device *dev) intel_gma_init_igd_opregion(); - /* IGD needs to be Bus Master */ - u32 reg32 = pci_read_config32(dev, PCI_COMMAND); - reg32 |= PCI_COMMAND_MASTER; - pci_write_config32(dev, PCI_COMMAND, reg32); - gtt_res = find_resource(dev, PCI_BASE_ADDRESS_0); if (!gtt_res || !gtt_res->base) return; + if (!CONFIG(NO_GFX_INIT)) + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); + /* Wait for any configured pre-graphics delay */ if (!acpi_is_wakeup_s3()) { #if CONFIG(CHROMEOS) diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 6b035bc736..ba4bc85a22 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -45,10 +45,8 @@ static void gma_init(struct device *const dev) if (CONFIG(RUN_FSP_GOP)) return; - /* IGD needs to Bus Master */ - u32 reg32 = pci_read_config32(dev, PCI_COMMAND); - reg32 |= PCI_COMMAND_MASTER; - pci_write_config32(dev, PCI_COMMAND, reg32); + if (!CONFIG(NO_GFX_INIT)) + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); if (CONFIG(MAINBOARD_USE_LIBGFXINIT)) { if (!acpi_is_wakeup_s3() && display_init_required()) { -- cgit v1.2.3