From d908916642eadf613e02d083cc54c9dacea28152 Mon Sep 17 00:00:00 2001 From: Wim Vervoorn Date: Fri, 13 Dec 2019 12:06:44 +0100 Subject: soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range The base address of the 16 MB flash range was reported as 0xFFF00000 this causes the range to extend above the 4GB boundary. Change the base to 0xFF000000 as is the case with e.g. Skylake. BUG=N/A TEST=build Change-Id: Ia8de01769ced00c5ae13f255760401933230b88c Signed-off-by: Wim Vervoorn Reviewed-on: https://review.coreboot.org/c/coreboot/+/37694 Tested-by: build bot (Jenkins) Reviewed-by: Frans Hendriks --- src/soc/intel/cannonlake/acpi/northbridge.asl | 2 +- src/soc/intel/icelake/acpi/northbridge.asl | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/cannonlake/acpi/northbridge.asl b/src/soc/intel/cannonlake/acpi/northbridge.asl index 22ddad7fbb..25291163cf 100644 --- a/src/soc/intel/cannonlake/acpi/northbridge.asl +++ b/src/soc/intel/cannonlake/acpi/northbridge.asl @@ -307,7 +307,7 @@ Device (PDRC) Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE) /* FLASH range */ - Memory32Fixed (ReadOnly, 0xFFF00000, 0x1000000, FIOH) + Memory32Fixed (ReadOnly, 0xFF000000, 0x1000000, FIOH) /* Local APIC range(0xFEE0_0000 to 0xFEEF_FFFF) */ Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000, LIOH) diff --git a/src/soc/intel/icelake/acpi/northbridge.asl b/src/soc/intel/icelake/acpi/northbridge.asl index e99e7edf1f..68c7f9e9fd 100644 --- a/src/soc/intel/icelake/acpi/northbridge.asl +++ b/src/soc/intel/icelake/acpi/northbridge.asl @@ -308,7 +308,7 @@ Device (PDRC) Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE) /* FLASH range */ - Memory32Fixed (ReadOnly, 0xFFF00000, 0x1000000, FIOH) + Memory32Fixed (ReadOnly, 0xFF000000, 0x1000000, FIOH) /* Local APIC range(0xFEE0_0000 to 0xFEEF_FFFF) */ Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000, LIOH) -- cgit v1.2.3