From d7ef450d88e67f4aa47c40dc746500693c3ccfb0 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 21 Apr 2020 01:23:10 -0500 Subject: soc/intel/apollolake: Hook up GMA ACPI brightness controls MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add struct i915_gpu_controller_info for boards to supply info needed to generate ACPI backlight control SSDT. Hook into soc/common framework by implementing intel_igd_get_controller_info(). Add Kconfig entries to set the correct register offsets for backlight frequency and duty cycle. Change-Id: Ia62a88b58e7efd90f550000fc5b2cef0cb5fade7 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/40593 Reviewed-by: Angel Pons Reviewed-by: Michael Niewöhner Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/soc/intel/apollolake/Kconfig | 18 ++++++++++++++++++ src/soc/intel/apollolake/chip.h | 3 +++ src/soc/intel/apollolake/graphics.c | 7 +++++++ 3 files changed, 28 insertions(+) (limited to 'src/soc') diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 4f762a9cd0..62049b5abe 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -413,4 +413,22 @@ config RO_REGION_ONLY string default "pdpt pt" +config INTEL_GMA_PANEL_2 + bool + default n + +config INTEL_GMA_BCLV_OFFSET + default 0xc8358 if INTEL_GMA_PANEL_2 + default 0xc8258 + +config INTEL_GMA_BCLV_WIDTH + default 32 + +config INTEL_GMA_BCLM_OFFSET + default 0xc8354 if INTEL_GMA_PANEL_2 + default 0xc8254 + +config INTEL_GMA_BCLM_WIDTH + default 32 + endif diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index c94b7ef180..482b333306 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -41,6 +41,9 @@ struct soc_intel_apollolake_config { */ struct i915_gpu_panel_config panel_cfg[2]; + /* i915 struct for GMA backlight control */ + struct i915_gpu_controller_info gfx; + /* * Mapping from PCIe root port to CLKREQ input on the SOC. The SOC has * four CLKREQ inputs, but six root ports. Root ports without an diff --git a/src/soc/intel/apollolake/graphics.c b/src/soc/intel/apollolake/graphics.c index c24ccdfee2..257222fdee 100644 --- a/src/soc/intel/apollolake/graphics.c +++ b/src/soc/intel/apollolake/graphics.c @@ -74,3 +74,10 @@ void graphics_soc_panel_init(struct device *const dev) for (i = 0; i < ARRAY_SIZE(conf->panel_cfg); ++i) graphics_configure_backlight(&conf->panel_cfg[i], mmio, i); } + +const struct i915_gpu_controller_info * +intel_igd_get_controller_info(const struct device *device) +{ + struct soc_intel_apollolake_config *chip = device->chip_info; + return &chip->gfx; +} -- cgit v1.2.3