From ce8763fb138afe8261301fc6a3638b7b18b381ac Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Date: Thu, 20 Sep 2018 23:52:43 +0200 Subject: mb/lowrisc: Remove the Nexys4DDR port MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This board doesn't support the newest RISC-V Privileged Architecture spec (1.10), and it's based on an FPGA so it's a moving target. Now that there's actual RISC-V silicon out there (from SiFive), mb/lowrisc/nexys4ddr will only continue to bitrot. Change-Id: I4e3e715106a1a94381a563dc4a56781c35883c2d Signed-off-by: Jonathan Neuschäfer Reviewed-on: https://review.coreboot.org/28706 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Hug Reviewed-by: Ronald G. Minnich --- src/soc/lowrisc/Kconfig | 2 -- src/soc/lowrisc/lowrisc/Kconfig | 29 ----------------------------- src/soc/lowrisc/lowrisc/Makefile.inc | 8 -------- src/soc/lowrisc/lowrisc/cbmem.c | 26 -------------------------- 4 files changed, 65 deletions(-) delete mode 100644 src/soc/lowrisc/Kconfig delete mode 100644 src/soc/lowrisc/lowrisc/Kconfig delete mode 100644 src/soc/lowrisc/lowrisc/Makefile.inc delete mode 100644 src/soc/lowrisc/lowrisc/cbmem.c (limited to 'src/soc') diff --git a/src/soc/lowrisc/Kconfig b/src/soc/lowrisc/Kconfig deleted file mode 100644 index a514135297..0000000000 --- a/src/soc/lowrisc/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -# Load all chipsets -source "src/soc/lowrisc/*/Kconfig" diff --git a/src/soc/lowrisc/lowrisc/Kconfig b/src/soc/lowrisc/lowrisc/Kconfig deleted file mode 100644 index 8b35231642..0000000000 --- a/src/soc/lowrisc/lowrisc/Kconfig +++ /dev/null @@ -1,29 +0,0 @@ -config SOC_LOWRISC_LOWRISC - select ARCH_RISCV - select ARCH_BOOTBLOCK_RISCV - select ARCH_VERSTAGE_RISCV - select ARCH_ROMSTAGE_RISCV - select ARCH_RAMSTAGE_RISCV - select BOOTBLOCK_CONSOLE - select DRIVERS_UART_8250MEM_32 - select GENERIC_UDELAY - select HAVE_MONOTONIC_TIMER - select RISCV_USE_ARCH_TIMER - bool - default n - -if SOC_LOWRISC_LOWRISC - -config RISCV_ARCH - string - default "rv64imafd" - -config RISCV_ABI - string - default "lp64d" - -config RISCV_CODEMODEL - string - default "medany" - -endif diff --git a/src/soc/lowrisc/lowrisc/Makefile.inc b/src/soc/lowrisc/lowrisc/Makefile.inc deleted file mode 100644 index ccd9a16945..0000000000 --- a/src/soc/lowrisc/lowrisc/Makefile.inc +++ /dev/null @@ -1,8 +0,0 @@ -ifeq ($(CONFIG_SOC_LOWRISC_LOWRISC),y) - -bootblock-y += mtime.c -romstage-y += cbmem.c -ramstage-y += cbmem.c -ramstage-y += mtime.c - -endif diff --git a/src/soc/lowrisc/lowrisc/cbmem.c b/src/soc/lowrisc/lowrisc/cbmem.c deleted file mode 100644 index a21266608b..0000000000 --- a/src/soc/lowrisc/lowrisc/cbmem.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - -void *cbmem_top(void) -{ - uintptr_t base; - size_t size; - - /* FIXME: These values shouldn't necessarily be hardcoded */ - base = 0x80000000; - size = 128 * MiB; - - return (void *)(base + size); -} -- cgit v1.2.3