From ce14b611d4d24c8c89c3f4c685998237b62a695e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Fri, 28 Oct 2022 15:53:23 +0200 Subject: soc/intel/alderlake: Hook up the OC watchdog MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hook up the OC watchdog common block and initialize it if requested. TEST=Enable watchdog on MSI PRO Z690-A and see the platform resets after some time. Enable the watchdog in driverless mode and see the platform no longer resets and periodic SMI keeps feeding the watchdog. Signed-off-by: Michał Żygowski Change-Id: I1c2c640d48b7e03ad8cd8d6cdf6aac447e93cd86 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68945 Reviewed-by: Krystian Hebel Tested-by: build bot (Jenkins) --- src/soc/intel/alderlake/Kconfig | 1 + src/soc/intel/alderlake/romstage/romstage.c | 3 +++ 2 files changed, 4 insertions(+) (limited to 'src/soc') diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 1ec207646b..2bfb07c9a1 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -65,6 +65,7 @@ config SOC_INTEL_ALDERLAKE select SOC_INTEL_COMMON_BLOCK_IRQ select SOC_INTEL_COMMON_BLOCK_ME_SPEC_16 select SOC_INTEL_COMMON_BLOCK_MEMINIT + select SOC_INTEL_COMMON_BLOCK_OC_WDT select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3 select SOC_INTEL_COMMON_BLOCK_PMC_EPOC select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c index dfe3b323aa..a674b0acc6 100644 --- a/src/soc/intel/alderlake/romstage/romstage.c +++ b/src/soc/intel/alderlake/romstage/romstage.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -166,6 +167,8 @@ void mainboard_romstage_entry(void) struct chipset_power_state *ps = pmc_get_power_state(); bool s3wake = pmc_fill_power_state(ps) == ACPI_S3; + setup_oc_wdt(); + /* Initialize HECI interface */ cse_init(HECI1_BASE_ADDRESS); -- cgit v1.2.3