From cbbb09b685eeb74afeb0fb9f14f7694fcd0654f0 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Thu, 1 Feb 2024 20:13:09 +0100 Subject: soc/amd/phoenix: add get_pci_routing_table stub for non-FSP case In the FSP case we get this info via a HOB. It's currently unclear if we'll get a data structure for this from openSIL or if we'll end up being able to just read the configuration fro the hardware, so add a get_pci_routing_table stub for now to be able to build. Signed-off-by: Felix Held Change-Id: I5003e287d6a3a9320922beaffff8a3a846531e14 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80294 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier --- src/soc/amd/phoenix/Makefile.mk | 1 + src/soc/amd/phoenix/pci_irq_routing.c | 14 ++++++++++++++ 2 files changed, 15 insertions(+) create mode 100644 src/soc/amd/phoenix/pci_irq_routing.c (limited to 'src/soc') diff --git a/src/soc/amd/phoenix/Makefile.mk b/src/soc/amd/phoenix/Makefile.mk index 9c775cc432..be0a02296f 100644 --- a/src/soc/amd/phoenix/Makefile.mk +++ b/src/soc/amd/phoenix/Makefile.mk @@ -32,6 +32,7 @@ ramstage-$(CONFIG_SOC_AMD_PHOENIX_FSP) += fsp_s_params.c ramstage-y += graphics.c ramstage-y += mca.c ramstage-y += memmap.c +ramstage-$(CONFIG_SOC_AMD_PHOENIX_OPENSIL) += pci_irq_routing.c ramstage-y += root_complex.c ramstage-y += soc_util.c ramstage-y += xhci.c diff --git a/src/soc/amd/phoenix/pci_irq_routing.c b/src/soc/amd/phoenix/pci_irq_routing.c new file mode 100644 index 0000000000..5c891c2644 --- /dev/null +++ b/src/soc/amd/phoenix/pci_irq_routing.c @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +const struct pci_routing_info *get_pci_routing_table(size_t *entries) +{ + /* TODO: still needs to be implemented for the non-FSP case */ + printk(BIOS_NOTICE, "%s stub: returning empty IRQ routing table\n", __func__); + + *entries = 0; + return NULL; +} -- cgit v1.2.3