From c6d89fba7a404684110a792a78dae86ec44b0738 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Thu, 28 May 2020 11:21:26 -0700 Subject: soc/amd/picasso: Relocate FSP-M to address in DRAM On Picasso, DRAM is up by the time FSP-M runs. This change relocates FSP-M binary to a specific address (0x90000000) in DRAM. Currently, this address is randomly chosen to ensure it does not overlap any of the other stages. Once we have a unified memory map set up for Picasso, this address can be updated along with it. BUG=b:155322763,b:150746858,b:152909132 Change-Id: I1a49765f00de9f97fa3dbd5bc288a3ed0d7087f6 Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/c/coreboot/+/41828 Reviewed-by: Aaron Durbin Reviewed-by: Raul Rangel Tested-by: build bot (Jenkins) --- src/soc/amd/picasso/Kconfig | 4 ++++ src/soc/amd/picasso/Makefile.inc | 2 ++ 2 files changed, 6 insertions(+) (limited to 'src/soc') diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index ddbc6c3137..bfa029b2d2 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -228,6 +228,10 @@ config MAINBOARD_POWER_RESTORE return to S0. Otherwise the system will remain in S5 once power is restored. +config FSP_M_ADDR + hex + default 0x90000000 + config X86_RESET_VECTOR hex default 0x807fff0 diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index d0046eaf10..d62ccda74d 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -458,4 +458,6 @@ apu/amdfw-type := raw endif # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) +$(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR) + endif # ($(CONFIG_SOC_AMD_PICASSO),y) -- cgit v1.2.3