From c3f9c4a511065fbb2ddadd16c55a15d7ad0b50b3 Mon Sep 17 00:00:00 2001 From: Sowmya Aralguppe Date: Fri, 2 Aug 2024 22:29:33 +0530 Subject: mb/google/brox: Fix booting to kernel without battery When battery is disconnected and only adaptor is connected higher PL2 power draw causes cpu brown out and system does not boot to kernel. To avoid this set Boot frequency UPD to 1. Reduce PL4 value to overcome power spikes from SoC during boot. Remove Psys implementation as it impacts active state platform performance. BUG=b:335046538,b:329722827 BRANCH=None TEST=Able to successfully boot on 3 different Brox proto2 SKU1 and SKU2 boards with 65W, 45W and 30W adaptors for 3 iterations of cold boot. Change-Id: I58e136c607ea9290ecac0cee453d6632760a6433 Signed-off-by: Sowmya Aralguppe Reviewed-on: https://review.coreboot.org/c/coreboot/+/83752 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Karthik Ramasubramanian --- src/soc/intel/alderlake/chip.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/soc') diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h index c3034ca2a3..040b3d131d 100644 --- a/src/soc/intel/alderlake/chip.h +++ b/src/soc/intel/alderlake/chip.h @@ -42,6 +42,13 @@ struct ibecc_config { /* add ECC error injection if needed by a mainboard */ }; +/* FSPM UPD for setting the boot frequency */ +enum fspm_boot_freq { + MAX_BATTERY_PERFORMANCE, + MAX_NONTURBO_PERFORMANCE, + TURBO_PERFORMANCE +}; + /* Types of different SKUs */ enum soc_intel_alderlake_power_limits { ADL_P_142_242_282_15W_CORE, -- cgit v1.2.3