From c29d6b8ab2a963e51dafe17b45a826f4c1627795 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Thu, 12 Dec 2013 16:55:36 -0800 Subject: baytrail: Put devices in ACPI mode after setup MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make sure reg_script is executed before the device is put into ACPI mode. BUG=chrome-os-partner:24380 BRANCH=none TEST=build and boot rambi from eMMC in ACPI mode Change-Id: I4090babbfc7fb0f3be4da869386e998d87a513ba Signed-off-by: Duncan Laurie Reviewed-on: https://chromium-review.googlesource.com/179896 Reviewed-by: Aaron Durbin Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/5017 Reviewed-by: Kyösti Mälkki Tested-by: build bot (Jenkins) --- src/soc/intel/baytrail/emmc.c | 5 +++-- src/soc/intel/baytrail/lpss.c | 3 +-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/baytrail/emmc.c b/src/soc/intel/baytrail/emmc.c index a724c4a3f7..f88614bfc5 100644 --- a/src/soc/intel/baytrail/emmc.c +++ b/src/soc/intel/baytrail/emmc.c @@ -53,10 +53,11 @@ static void emmc_init(device_t dev) { struct soc_intel_baytrail_config *config = dev->chip_info; - if (config->scc_acpi_mode) - scc_enable_acpi_mode(dev, SCC_MMC_CTL, SCC_NVS_MMC); printk(BIOS_DEBUG, "eMMC init\n"); reg_script_run_on_dev(dev, emmc_ops); + + if (config->scc_acpi_mode) + scc_enable_acpi_mode(dev, SCC_MMC_CTL, SCC_NVS_MMC); } static struct device_operations device_ops = { diff --git a/src/soc/intel/baytrail/lpss.c b/src/soc/intel/baytrail/lpss.c index a543fd858c..3ee648a55c 100644 --- a/src/soc/intel/baytrail/lpss.c +++ b/src/soc/intel/baytrail/lpss.c @@ -165,11 +165,10 @@ static void lpss_init(device_t dev) return; } dev_enable_snoop_and_pm(dev, iosf_reg); + i2c_disable_resets(dev); if (config->lpss_acpi_mode) dev_enable_acpi_mode(dev, iosf_reg, nvs_index); - - i2c_disable_resets(dev); } static struct device_operations device_ops = { -- cgit v1.2.3