From bf7b5bc64a6f4cef485f2c78607835d20e7f2e5d Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Wed, 23 Sep 2015 17:57:20 -0700 Subject: skylake: Work around issue in ACPI interpreter There appears to be an issue that is causing this particular bit of ACPI code to be incorrectly interpreted by the kernel and the IASL disassembler. Ensuring the PCRB() method is defined in the DSDT before any uses of it appears to fix the problem, but that relies on specific ordering of the ASL files included by pch.asl and may break again in the future if the includes were re-ordered. (they are alphabetic now) So in this case to work around the issue unroll the function call so the admittedly messy calculation is reduced to a constant when compiled. Note this issue was observed with both iasl-20130117 and iasl-20150717. ACPICA bug: https://bugs.acpica.org/show_bug.cgi?id=1201 BUG=chrome-os-partner:45760 BRANCH=none TEST=verify disassembled AML is correct Change-Id: I7b6a3b792f79755db0ea7b9f2ef6ee7f5000e018 Signed-off-by: Patrick Georgi Original-Commit-Id: ecacc340d6e1068ea649f0859657bb3208695730 Original-Change-Id: I232523f5b6ce290da6e7d99405a53b9437b10e0d Original-Signed-off-by: Duncan Laurie Original-Reviewed-on: https://chromium-review.googlesource.com/302167 Original-Reviewed-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/11721 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/intel/skylake/acpi/irqlinks.asl | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/skylake/acpi/irqlinks.asl b/src/soc/intel/skylake/acpi/irqlinks.asl index b7a78f0b18..3c74257d2d 100644 --- a/src/soc/intel/skylake/acpi/irqlinks.asl +++ b/src/soc/intel/skylake/acpi/irqlinks.asl @@ -19,9 +19,19 @@ * Foundation, Inc. */ -/* PIRQ routing control is in PCR ITSS region */ +/* + * PIRQ routing control is in PCR ITSS region. + * + * Due to what appears to be an ACPI interpreter bug we do not use + * the PCRB() method here as it may not be defined yet because the method + * definiton depends on the order of the include files in pch.asl. + * + * https://bugs.acpica.org/show_bug.cgi?id=1201 + */ OperationRegion (ITSS, SystemMemory, - Add (PCRB (PID_ITSS), R_PCH_PCR_ITSS_PIRQA_ROUT), 8) + Add (R_PCH_PCR_ITSS_PIRQA_ROUT, + Add (PCH_PCR_BASE_ADDRESS, + ShiftLeft (PID_ITSS, PCR_PORTID_SHIFT))), 8) Field (ITSS, ByteAcc, NoLock, Preserve) { PIRA, 8, /* PIRQA Routing Control */ -- cgit v1.2.3