From bb052ced54903e8543cba74649ff412fbcb8e1c5 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 13 Feb 2022 13:20:36 -0600 Subject: soc/intel/apollolake: Fix overlapping ACPI resource ranges The address space allotted to MCRS in the northbridge needs to be exclusive of the address space allotted to the GPIO controllers in the southbridge, otherwise Windows complains of overlapping resource ranges and disables the GPIO controllers. To prevent overlap, use CONFIG_PCR_BASE_ADDRESS to set the upper bound of MCRS rather than MMCONF. Test: boot Windows 10/11 on google/{reef,ampton} and verify that GPIO controllers are indicated as without fault in Device Manager. Change-Id: I2117054edb448e717b7cbe80958c9c4e6c996e2b Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/61908 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Sean Rhodes Reviewed-by: Tim Wawrzynczak Reviewed-by: CoolStar Organization --- src/soc/intel/apollolake/acpi/northbridge.asl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl index 834e5e4170..b05dc5603f 100644 --- a/src/soc/intel/apollolake/acpi/northbridge.asl +++ b/src/soc/intel/apollolake/acpi/northbridge.asl @@ -79,8 +79,8 @@ Method (_CRS, 0, Serialized) /* Read C-Unit PCI CFG Reg. 0xBC for TOLUD (shadow from B-Unit) */ PMIN = \_SB.PCI0.MCHC.TLUD & 0xFFF00000 - /* Read MMCONF base */ - PMAX = \_SB.PCI0.MCHC.MCNF & 0xF0000000 + /* Use PCR base to ensure PMAX below GPIO controllers attached to _SB */ + PMAX = CONFIG_PCR_BASE_ADDRESS & 0xF0000000 /* Calculate PCI MMIO Length */ PLEN = PMAX - PMIN + 1 -- cgit v1.2.3