From ba9b504ec5d8bc42f56cb085749c1296b1291ba9 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Thu, 19 Dec 2019 07:47:52 +0100 Subject: src: Replace min/max() with MIN/MAX() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I63b95144f2022685c60a1bd6de5af3c1f059992e Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/37828 Reviewed-by: Kyösti Mälkki Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/soc/mediatek/common/cbmem.c | 4 ++-- src/soc/mediatek/mt8173/dramc_pi_calibration_api.c | 4 ++-- src/soc/rockchip/common/cbmem.c | 4 ++-- src/soc/sifive/fu540/cbmem.c | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) (limited to 'src/soc') diff --git a/src/soc/mediatek/common/cbmem.c b/src/soc/mediatek/common/cbmem.c index 1a55d0113e..accafeb9c0 100644 --- a/src/soc/mediatek/common/cbmem.c +++ b/src/soc/mediatek/common/cbmem.c @@ -14,8 +14,8 @@ */ #include +#include #include -#include #include #include @@ -23,5 +23,5 @@ void *cbmem_top_chipset(void) { - return (void *)min((uintptr_t)_dram + sdram_size(), MAX_DRAM_ADDRESS); + return (void *)MIN((uintptr_t)_dram + sdram_size(), MAX_DRAM_ADDRESS); } diff --git a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c index a22d7e22d1..492238a80c 100644 --- a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c +++ b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c @@ -308,7 +308,7 @@ static u8 dqs_gw_fine_tune_calib(u32 channel, u8 fine_val) int matches = 0, sum = 0; /* fine tune range from 0 to 127 */ - fine_val = min(max(fine_val, 0 - delta[0]), 127 - delta[6]); + fine_val = MIN(MAX(fine_val, 0 - delta[0]), 127 - delta[6]); /* test gw fine tune */ for (i = 0; i < ARRAY_SIZE(delta); i++) { @@ -443,7 +443,7 @@ void dramc_rankinctl_config(u32 channel, if (is_dual_rank(channel, sdram_params)) { /* RANKINCTL_ROOT1 = DQSINCTL + reg_TX_DLY_DQSGATE */ - value = min(opt_gw_coarse_value[channel][0], + value = MIN(opt_gw_coarse_value[channel][0], opt_gw_coarse_value[channel][1]) >> 2; clrsetbits32(&ch[channel].ao_regs->dummy, 0xf, value); diff --git a/src/soc/rockchip/common/cbmem.c b/src/soc/rockchip/common/cbmem.c index 6e3aabb81c..ccaa62433a 100644 --- a/src/soc/rockchip/common/cbmem.c +++ b/src/soc/rockchip/common/cbmem.c @@ -14,13 +14,13 @@ */ #include +#include #include #include -#include #include void *cbmem_top_chipset(void) { - return (void *)min((uintptr_t)_dram + sdram_size_mb() * MiB, + return (void *)MIN((uintptr_t)_dram + sdram_size_mb() * MiB, MAX_DRAM_ADDRESS); } diff --git a/src/soc/sifive/fu540/cbmem.c b/src/soc/sifive/fu540/cbmem.c index a7de16c56a..b6b568df8d 100644 --- a/src/soc/sifive/fu540/cbmem.c +++ b/src/soc/sifive/fu540/cbmem.c @@ -14,13 +14,13 @@ */ #include +#include #include #include -#include #include void *cbmem_top_chipset(void) { - return (void *)min((uintptr_t)_dram + sdram_size_mb() * MiB, + return (void *)MIN((uintptr_t)_dram + sdram_size_mb() * MiB, FU540_MAXDRAM); } -- cgit v1.2.3