From af3f8298d62832d1bb2bee4ef08097052e07c1a7 Mon Sep 17 00:00:00 2001
From: Yidi Lin <yidilin@chromium.org>
Date: Tue, 15 Oct 2024 16:43:39 +0800
Subject: soc/mediatek/common: Config CAL_TOL_RATE and CAL_MAX_VAL in SoC
 folder

MT8196 has differenet configurations from other platforms. Make
CAL_TOL_RATE and CAL_MAX_VAL as per SoC configuration in order to reuse
common/pmif_clk.c

BUG=none
TEST=emerge-corsola coreboot; emerge-geralt coreboot

Change-Id: Iefc8180e1719d9796df7457b619a8792ceb762b2
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84771
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/mediatek/common/include/soc/pmif_sw.h | 6 ------
 src/soc/mediatek/common/pmif_clk.c            | 1 +
 src/soc/mediatek/mt8186/include/soc/pmif.h    | 6 ++++++
 src/soc/mediatek/mt8188/include/soc/pmif.h    | 6 ++++++
 src/soc/mediatek/mt8192/include/soc/pmif.h    | 6 ++++++
 src/soc/mediatek/mt8195/include/soc/pmif.h    | 6 ++++++
 6 files changed, 25 insertions(+), 6 deletions(-)

(limited to 'src/soc')

diff --git a/src/soc/mediatek/common/include/soc/pmif_sw.h b/src/soc/mediatek/common/include/soc/pmif_sw.h
index ea26446298..c273c8e0fd 100644
--- a/src/soc/mediatek/common/include/soc/pmif_sw.h
+++ b/src/soc/mediatek/common/include/soc/pmif_sw.h
@@ -17,12 +17,6 @@ enum {
 	PMIF_WAIT_IDLE_US   = 1000,
 };
 
-/* calibation tolerance rate, unit: 0.1% */
-enum {
-	CAL_TOL_RATE = 40,
-	CAL_MAX_VAL = 0x7F,
-};
-
 u32 pmif_get_ulposc_freq_mhz(u32 cali_val);
 int pmif_clk_init(void);
 #endif /* __SOC_MEDIATEK_PMIF_SW_H__ */
diff --git a/src/soc/mediatek/common/pmif_clk.c b/src/soc/mediatek/common/pmif_clk.c
index cfd1dbce6b..f4e1d0eb7b 100644
--- a/src/soc/mediatek/common/pmif_clk.c
+++ b/src/soc/mediatek/common/pmif_clk.c
@@ -2,6 +2,7 @@
 
 #include <commonlib/helpers.h>
 #include <console/console.h>
+#include <soc/pmif.h>
 #include <soc/pmif_clk_common.h>
 #include <soc/pmif_sw.h>
 
diff --git a/src/soc/mediatek/mt8186/include/soc/pmif.h b/src/soc/mediatek/mt8186/include/soc/pmif.h
index 2eecb26c08..141caa3a31 100644
--- a/src/soc/mediatek/mt8186/include/soc/pmif.h
+++ b/src/soc/mediatek/mt8186/include/soc/pmif.h
@@ -136,6 +136,12 @@ enum {
 	FREQ_250MHZ = 250,
 };
 
+/* calibation tolerance rate, unit: 0.1% */
+enum {
+	CAL_TOL_RATE = 40,
+	CAL_MAX_VAL = 0x7F,
+};
+
 struct mtk_scp_clk_regs {
 	u32 reserved0;
 	u32 scp_clk_en;
diff --git a/src/soc/mediatek/mt8188/include/soc/pmif.h b/src/soc/mediatek/mt8188/include/soc/pmif.h
index 3cb8f3505f..39737ce659 100644
--- a/src/soc/mediatek/mt8188/include/soc/pmif.h
+++ b/src/soc/mediatek/mt8188/include/soc/pmif.h
@@ -137,6 +137,12 @@ enum {
 	FREQ_260MHZ = 260,
 };
 
+/* calibation tolerance rate, unit: 0.1% */
+enum {
+	CAL_TOL_RATE = 40,
+	CAL_MAX_VAL = 0x7F,
+};
+
 #define FREQ_METER_ABIST_AD_OSC_CK	42
 #define CALI_DEFAULT_CAP_VALUE		0x3d
 
diff --git a/src/soc/mediatek/mt8192/include/soc/pmif.h b/src/soc/mediatek/mt8192/include/soc/pmif.h
index d8d0101524..4e2c40fda9 100644
--- a/src/soc/mediatek/mt8192/include/soc/pmif.h
+++ b/src/soc/mediatek/mt8192/include/soc/pmif.h
@@ -130,5 +130,11 @@ enum {
 	FREQ_260MHZ = 260,
 };
 
+/* calibation tolerance rate, unit: 0.1% */
+enum {
+	CAL_TOL_RATE = 40,
+	CAL_MAX_VAL = 0x7F,
+};
+
 #define FREQ_METER_ABIST_AD_OSC_CK	37
 #endif /*__MT8192_SOC_PMIF_H__*/
diff --git a/src/soc/mediatek/mt8195/include/soc/pmif.h b/src/soc/mediatek/mt8195/include/soc/pmif.h
index ab293b2d66..7ee9531917 100644
--- a/src/soc/mediatek/mt8195/include/soc/pmif.h
+++ b/src/soc/mediatek/mt8195/include/soc/pmif.h
@@ -140,5 +140,11 @@ enum {
 	FREQ_248MHZ = 248,
 };
 
+/* calibation tolerance rate, unit: 0.1% */
+enum {
+	CAL_TOL_RATE = 40,
+	CAL_MAX_VAL = 0x7F,
+};
+
 #define FREQ_METER_ABIST_AD_OSC_CK	48
 #endif /*__MT8195_SOC_PMIF_H__*/
-- 
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