From a40032780fe4da7d95b203fb3d05a25183590952 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Thu, 3 Sep 2015 11:27:27 +0200 Subject: chromeos: vboot and chromeos dependency removal for sw write protect state This removes the dependency on chromeos and vboot for the sw write protect state function: vboot_get_sw_write_protect, renamed to get_sw_write_protect_state to both reflect this change and become consistent with the definition of get_write_protect_state that is already in use. Change-Id: I47ce31530a03f6749e0f370e5d868466318b3bb6 Signed-off-by: Paul Kocialkowski Reviewed-on: http://review.coreboot.org/11496 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/baytrail/romstage/romstage.c | 4 +--- src/soc/intel/broadwell/romstage/romstage.c | 4 +--- src/soc/intel/skylake/romstage/romstage.c | 4 +--- 3 files changed, 3 insertions(+), 9 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index 1b93eb67f4..7bd2663b25 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -362,11 +362,9 @@ void ramstage_cache_invalid(void) #endif } -#if CONFIG_CHROMEOS -int vboot_get_sw_write_protect(void) +int get_sw_write_protect_state(void) { u8 status; /* Return unprotected status if status read fails. */ return (early_spi_read_wpsr(&status) ? 0 : !!(status & 0x80)); } -#endif diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index 27fb0f28c5..884c274316 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -147,13 +147,11 @@ void ramstage_cache_invalid(void) #endif } -#if CONFIG_CHROMEOS -int vboot_get_sw_write_protect(void) +int get_sw_write_protect_state(void) { u8 status; /* Return unprotected status if status read fails. */ return (early_spi_read_wpsr(&status) ? 0 : !!(status & 0x80)); } -#endif void __attribute__((weak)) mainboard_pre_console_init(void) {} diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index 6c5d64a6c6..6804459c19 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -68,15 +68,13 @@ void soc_romstage_init(struct romstage_params *params) pch_early_init(); } -#if IS_ENABLED(CONFIG_CHROMEOS) -int vboot_get_sw_write_protect(void) +int get_sw_write_protect_state(void) { u8 status; /* Return unprotected status if status read fails. */ return early_spi_read_wpsr(&status) ? 0 : !!(status & 0x80); } -#endif /* UPD parameters to be initialized before MemoryInit */ void soc_memory_init_params(struct romstage_params *params, -- cgit v1.2.3