From 9faae2b939d0c83632baeefe80bef1739e125018 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Wed, 14 Nov 2018 00:00:35 +0100 Subject: Kconfig: Unify power-after-failure options The newest and most useful incarnation was hiding in soc/intel/common/. We move it into the Mainboard menu and extend it with various flags to be selected to control the default and which options are visible. Also add a new `int` config MAINBOARD_POWER_FAILURE_STATE that moves the boolean to int conversion into Kconfig: 0 - S5 1 - S0 2 - previous state This patch focuses on the Kconfig code. The C code could be unified as well, e.g. starting with a common enum and safe wrapper around the get_option() call. TEST=Did what-jenkins-does with and without this commit and compared binaries. Nothing changed for the default configurations. Change-Id: I61259f864c8a8cfc7099cc2699059f972fa056c0 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/29680 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/soc/intel/broadwell/Kconfig | 2 ++ src/soc/intel/broadwell/lpc.c | 2 +- src/soc/intel/broadwell/smihandler.c | 2 +- .../common/block/include/intelblocks/pmclib.h | 1 + src/soc/intel/common/block/pmc/Kconfig | 28 +++------------------- src/soc/intel/common/block/pmc/pmclib.c | 7 +----- 6 files changed, 9 insertions(+), 33 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index be9acc538e..1a8349d08f 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -41,6 +41,8 @@ config CPU_SPECIFIC_OPTIONS select INTEL_GMA_ACPI select POSTCAR_STAGE select POSTCAR_CONSOLE + select HAVE_POWER_STATE_AFTER_FAILURE + select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE config PCIEXP_ASPM bool diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index 87aaf6b896..762198b1a8 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -152,7 +152,7 @@ static void pch_power_options(struct device *dev) const char *state; /* Get the chip configuration */ config_t *config = dev->chip_info; - int pwr_on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL; + int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE; /* Which state do we want to goto after g3 (power restored)? * 0 == S0 Full On diff --git a/src/soc/intel/broadwell/smihandler.c b/src/soc/intel/broadwell/smihandler.c index 777c0d20a1..52725f25b2 100644 --- a/src/soc/intel/broadwell/smihandler.c +++ b/src/soc/intel/broadwell/smihandler.c @@ -152,7 +152,7 @@ static void southbridge_smi_sleep(void) u8 reg8; u32 reg32; u8 slp_typ; - u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL; + u8 s5pwr = CONFIG_MAINBOARD_POWER_FAILURE_STATE; /* save and recover RTC port values */ u8 tmp70, tmp72; diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h index 9b21010064..45695252f4 100644 --- a/src/soc/intel/common/block/include/intelblocks/pmclib.h +++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h @@ -213,6 +213,7 @@ void soc_fill_power_state(struct chipset_power_state *ps); * 0 == S5 Soft Off * 1 == S0 Full On * 2 == Keep Previous State + * Keep in sync with `config MAINBOARD_POWER_FAILURE_STATE`. */ enum { MAINBOARD_POWER_STATE_OFF, diff --git a/src/soc/intel/common/block/pmc/Kconfig b/src/soc/intel/common/block/pmc/Kconfig index 2f0840847b..c2757e6e72 100644 --- a/src/soc/intel/common/block/pmc/Kconfig +++ b/src/soc/intel/common/block/pmc/Kconfig @@ -2,35 +2,13 @@ config SOC_INTEL_COMMON_BLOCK_PMC depends on SOC_INTEL_COMMON_BLOCK_GPIO depends on ACPI_INTEL_HARDWARE_SLEEP_VALUES bool + select HAVE_POWER_STATE_AFTER_FAILURE + select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE + select POWER_STATE_DEFAULT_ON_AFTER_FAILURE help Intel Processor common code for Power Management controller(PMC) subsystem -choice - prompt "System Power State after Failure" - default POWER_STATE_ON_AFTER_FAILURE - -config POWER_STATE_OFF_AFTER_FAILURE - bool "S5 Soft Off" - help - Choose this option if you want to keep system into - S5 after reapplying power after failure - -config POWER_STATE_ON_AFTER_FAILURE - bool "S0 Full On" - help - Choose this option if you want to keep system into - S0 after reapplying power after failure - -config POWER_STATE_PREVIOUS_AFTER_FAILURE - bool "Keep Previous State" - help - Choose this option if you want to keep system into - same power state as before failure even after reapplying - power - -endchoice - config PMC_INVALID_READ_AFTER_WRITE bool default n diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c index ef4384d395..dcc7cc9a4b 100644 --- a/src/soc/intel/common/block/pmc/pmclib.c +++ b/src/soc/intel/common/block/pmc/pmclib.c @@ -587,10 +587,5 @@ void pmc_gpe_init(void) */ int pmc_get_mainboard_power_failure_state_choice(void) { - if (IS_ENABLED(CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE)) - return MAINBOARD_POWER_STATE_PREVIOUS; - else if (IS_ENABLED(CONFIG_POWER_STATE_ON_AFTER_FAILURE)) - return MAINBOARD_POWER_STATE_ON; - - return MAINBOARD_POWER_STATE_OFF; + return CONFIG_MAINBOARD_POWER_FAILURE_STATE; } -- cgit v1.2.3