From 9f7df5c18a426947e173277a294537d7534eef48 Mon Sep 17 00:00:00 2001
From: Kangheui Won <khwon@chromium.org>
Date: Sun, 4 Oct 2020 21:12:06 +1100
Subject: soc/amd/picasso: add monotonic_timer

On Zork(picasso) platform we run verstage on the PSP. It has its own
timer, but the frequency is not matched with TSC.

To ease the work to merge timestamps from the PSP and TSC, add a layer
around tsc to have microsecond granularity for timestamp table. PSP
already records timestamp in microseconds.

BUG=b:159220781
BRANCH=zork
TEST=build, flash and boot, check timestamps are correct

Signed-off-by: Kangheui Won <khwon@chromium.org>
Change-Id: Ifced4a84071be8da547e252167ec21cd42f20ccc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46058
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Eric Peers <epeers@google.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/amd/picasso/Kconfig           |  2 +-
 src/soc/amd/picasso/Makefile.inc      |  5 +++++
 src/soc/amd/picasso/monotonic_timer.c | 16 ++++++++++++++++
 3 files changed, 22 insertions(+), 1 deletion(-)
 create mode 100644 src/soc/amd/picasso/monotonic_timer.c

(limited to 'src/soc')

diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 7e03a41613..605b0eacea 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -24,7 +24,7 @@ config CPU_SPECIFIC_OPTIONS
 	select IOAPIC
 	select HAVE_EM100_SUPPORT
 	select HAVE_USBDEBUG_OPTIONS
-	select TSC_MONOTONIC_TIMER
+	select COLLECT_TIMESTAMPS_NO_TSC
 	select SOC_AMD_COMMON_BLOCK_SPI
 	select TSC_SYNC_LFENCE
 	select UDELAY_TSC
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index 7ec695aed9..f0c6ae52f2 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -18,6 +18,7 @@ bootblock-y += southbridge.c
 bootblock-y += i2c.c
 bootblock-y += uart.c
 bootblock-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
+bootblock-y += monotonic_timer.c
 bootblock-y += tsc_freq.c
 bootblock-y += gpio.c
 bootblock-y += smi_util.c
@@ -34,6 +35,7 @@ romstage-y += reset.c
 romstage-y += memmap.c
 romstage-y += uart.c
 romstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
+romstage-y += monotonic_timer.c
 romstage-y += tsc_freq.c
 romstage-y += aoac.c
 romstage-y += southbridge.c
@@ -49,6 +51,7 @@ verstage-y += aoac.c
 verstage_x86-y += gpio.c
 verstage_x86-y += uart.c
 verstage_x86-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
+verstage_x86-y += monotonic_timer.c
 verstage_x86-y += tsc_freq.c
 verstage_x86-y += reset.c
 
@@ -72,6 +75,7 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
 ramstage-y += uart.c
 ramstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
+ramstage-y += monotonic_timer.c
 ramstage-y += tsc_freq.c
 ramstage-y += finalize.c
 ramstage-y += soc_util.c
@@ -86,6 +90,7 @@ ramstage-y += dmi.c
 
 smm-y += smihandler.c
 smm-y += smi_util.c
+smm-y += monotonic_timer.c
 smm-y += tsc_freq.c
 ifeq ($(CONFIG_DEBUG_SMI),y)
 smm-y += uart.c
diff --git a/src/soc/amd/picasso/monotonic_timer.c b/src/soc/amd/picasso/monotonic_timer.c
new file mode 100644
index 0000000000..941532cca6
--- /dev/null
+++ b/src/soc/amd/picasso/monotonic_timer.c
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <cpu/x86/msr.h>
+#include <cpu/x86/tsc.h>
+#include <timer.h>
+#include <timestamp.h>
+
+void timer_monotonic_get(struct mono_time *mt)
+{
+	mono_time_set_usecs(mt, timestamp_get());
+}
+
+uint64_t timestamp_get(void)
+{
+	return rdtscll() / tsc_freq_mhz();
+}
-- 
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