From 9d18e330fd2e6a3f9daf31f2111f82af0dd3c78d Mon Sep 17 00:00:00 2001 From: Werner Zeh Date: Thu, 8 Sep 2016 07:52:03 +0200 Subject: siemens/mc_bdx1: Enable decoding for COM 3 & COM 4 on LPC Since this mainboard provides 4 COM ports on LPC, enable decoding of the corresponding addresses using the generic LPC decode registers. Change-Id: I0e93d40dca01d55f3567a18c7ec02269e3bec466 Signed-off-by: Werner Zeh Reviewed-on: https://review.coreboot.org/16535 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Aaron Durbin --- src/soc/intel/fsp_broadwell_de/include/soc/lpc.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/soc') diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h b/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h index 30cb5764f2..60cdc89f51 100644 --- a/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h +++ b/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h @@ -25,6 +25,10 @@ #define PIRQ_RCR2 0x68 #define LPC_IO_DEC 0x80 #define LPC_EN 0x82 +#define LPC_GEN1_DEC 0x84 +#define LPC_GEN2_DEC 0x88 +#define LPC_GEN3_DEC 0x8c +#define LPC_GEN4_DEC 0x90 #define GEN_PMCON_1 0xA0 #define GEN_PMCON_2 0xA2 #define GEN_PMCON_3 0xA4 -- cgit v1.2.3