From 992e09a1d5e0501711ee76083d9d00828fcbddd7 Mon Sep 17 00:00:00 2001 From: Jarried Lin Date: Fri, 1 Nov 2024 15:19:43 +0800 Subject: soc/mediatek/mt8196: Add version two DPM driver Add version two of the DPM driver for DVFS and DRAM low power feature. MT8196 equips new DPM hardware which is different from precedent SoCs. Therefore, we implement a new DPM loader (said version 2) to run the blob. The new DPM driver includes following features. - Simplify the DPM loading flow without the needs of waking DPM SRAM up and initializing bootargs. - Use the broadcast function to ensure that the DPM load and reset operations performed on channel A will be synchronized to the other three channels. TEST=Full calibration pass. BUG=b:317009620 Change-Id: I77e1ac252b00ab9c4864cc308f20da4a79714e4c Signed-off-by: Crystal Guo Reviewed-on: https://review.coreboot.org/c/coreboot/+/85121 Reviewed-by: Yu-Ping Wu Tested-by: build bot (Jenkins) Reviewed-by: Yidi Lin --- src/soc/mediatek/common/dpm_v2.c | 45 ++++++++++++++++++++++++++++ src/soc/mediatek/common/include/soc/dpm_v2.h | 22 ++++++++++++++ src/soc/mediatek/mt8196/Kconfig | 11 +++++++ src/soc/mediatek/mt8196/Makefile.mk | 13 ++++++++ 4 files changed, 91 insertions(+) create mode 100644 src/soc/mediatek/common/dpm_v2.c create mode 100644 src/soc/mediatek/common/include/soc/dpm_v2.h (limited to 'src/soc') diff --git a/src/soc/mediatek/common/dpm_v2.c b/src/soc/mediatek/common/dpm_v2.c new file mode 100644 index 0000000000..b0f0dbcb88 --- /dev/null +++ b/src/soc/mediatek/common/dpm_v2.c @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +static struct mtk_mcu dpm_mcu[] = { + { + .firmware_name = CONFIG_DPM_DM_FIRMWARE, + .run_address = (void *)DPM_DM_SRAM_BASE, + }, + { + .firmware_name = CONFIG_DPM_PM_FIRMWARE, + .run_address = (void *)DPM_PM_SRAM_BASE, + .reset = dpm_reset, + }, +}; + +void dpm_reset(struct mtk_mcu *mcu) +{ + /* free RST */ + setbits32p(DPM_CFG_CH0 + DPM_RST_OFFSET, DPM_SW_RSTN); +} + +int dpm_init(void) +{ + int i; + struct mtk_mcu *dpm; + u32 dramc_wbr_backup = read32p(DRAMC_WBR); + + setbits32p(DRAMC_WBR, ENABLE_DRAMC_WBR_MASK); + + for (i = 0; i < ARRAY_SIZE(dpm_mcu); i++) { + dpm = &dpm_mcu[i]; + dpm->load_buffer = _dram_dma; + dpm->buffer_size = REGION_SIZE(dram_dma); + if (mtk_init_mcu(dpm)) + return -1; + } + + write32p(DRAMC_WBR, dramc_wbr_backup); + + return 0; +} diff --git a/src/soc/mediatek/common/include/soc/dpm_v2.h b/src/soc/mediatek/common/include/soc/dpm_v2.h new file mode 100644 index 0000000000..c11a9bb2da --- /dev/null +++ b/src/soc/mediatek/common/include/soc/dpm_v2.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __SOC_MEDIATEK_COMMON_DPM_V2_H__ +#define __SOC_MEDIATEK_COMMON_DPM_V2_H__ + +#include +#include + +#define DPM_RST_OFFSET 0x7074 +#define DPM_SW_RSTN BIT(0) + +#define DPM_CFG_CH0 DPM_CFG_BASE +#define DPM_BARGS_CH0_REG0 (DPM_CFG_BASE + 0x6004) +#define DPM_BARGS_CH0_REG1 (DPM_CFG_BASE + 0x6008) +#define DRAMC_WBR (INFRACFG_AO_BASE + 0x0b4) + +#define ENABLE_DRAMC_WBR_MASK 0x2ffff + +void dpm_reset(struct mtk_mcu *mcu); +int dpm_init(void); + +#endif /* __SOC_MEDIATEK_COMMON_DPM_V2_H__ */ diff --git a/src/soc/mediatek/mt8196/Kconfig b/src/soc/mediatek/mt8196/Kconfig index 69823e4fa8..c934761ffb 100644 --- a/src/soc/mediatek/mt8196/Kconfig +++ b/src/soc/mediatek/mt8196/Kconfig @@ -26,4 +26,15 @@ config VBOOT select VBOOT_RETURN_FROM_VERSTAGE select VBOOT_DEFINE_WIDEVINE_COUNTERS +config DPM_DM_FIRMWARE + string + default "dpm.dm" + help + The file name of the MediaTek DPM DM firmware. + +config DPM_PM_FIRMWARE + string + default "dpm.pm" + help + The file name of the MediaTek DPM PM firmware. endif diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index 3a1d103a8e..c0b491452e 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -29,9 +29,11 @@ romstage-y += ../common/memory.c memory.c romstage-y += ../common/memory_test.c romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c +ramstage-y += ../common/dpm_v2.c ramstage-y += ../common/early_init.c ramstage-y += ../common/emi.c ramstage-y += l2c_ops.c +ramstage-y += ../common/mcu.c ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c ramstage-$(CONFIG_PCI) += ../common/pcie.c pcie.c ramstage-y += soc.c @@ -42,6 +44,17 @@ CPPFLAGS_common += -Isrc/soc/mediatek/common/include MT8196_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8196 +mcu-firmware-files := \ + $(CONFIG_DPM_DM_FIRMWARE) \ + $(CONFIG_DPM_PM_FIRMWARE) + +$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \ + $(eval $(fw)-file := $(MT8196_BLOB_DIR)/$(fw)) \ + $(eval $(fw)-type := raw) \ + $(eval $(fw)-compression := LZ4) \ + $(if $(wildcard $($(fw)-file)), $(eval cbfs-files-y += $(fw)), ) \ +) + DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram $(DRAM_CBFS)-file := $(MT8196_BLOB_DIR)/dram.elf $(DRAM_CBFS)-type := stage -- cgit v1.2.3