From 953d7d979b9d358636df0504d18f1ed5d6fdc265 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Thu, 1 Feb 2024 20:50:11 +0100 Subject: soc/amd/phoenix/fch: only init ACPI IO ports in FSP case Since openSIL configures the APCI IO port addresses, coreboot should not overwrite them. Signed-off-by: Felix Held Change-Id: If10e5a9f52ab313ad1afebd7f9e722994d48b0a7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80297 Reviewed-by: Matt DeVillier Tested-by: build bot (Jenkins) --- src/soc/amd/phoenix/fch.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'src/soc') diff --git a/src/soc/amd/phoenix/fch.c b/src/soc/amd/phoenix/fch.c index e9bc80a505..1e03cda105 100644 --- a/src/soc/amd/phoenix/fch.c +++ b/src/soc/amd/phoenix/fch.c @@ -89,10 +89,12 @@ static void fch_init_acpi_ports(void) * ACPI tables are generated. Enable these ports indiscriminately. */ - pm_write16(PM_EVT_BLK, ACPI_PM_EVT_BLK); - pm_write16(PM1_CNT_BLK, ACPI_PM1_CNT_BLK); - pm_write16(PM_TMR_BLK, ACPI_PM_TMR_BLK); - pm_write16(PM_GPE0_BLK, ACPI_GPE0_BLK); + if (CONFIG(PLATFORM_USES_FSP2_0)) { + pm_write16(PM_EVT_BLK, ACPI_PM_EVT_BLK); + pm_write16(PM1_CNT_BLK, ACPI_PM1_CNT_BLK); + pm_write16(PM_TMR_BLK, ACPI_PM_TMR_BLK); + pm_write16(PM_GPE0_BLK, ACPI_GPE0_BLK); + } if (CONFIG(HAVE_SMI_HANDLER)) { /* APMC - SMI Command Port */ -- cgit v1.2.3