From 94146009a190383a581618fd969bf2276fb73585 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Thu, 14 Nov 2019 11:30:43 +0530 Subject: soc/intel/icelake: Make CpuMpPpi implementation default for ICL TEST=Could able to build and boot ICL DE system Change-Id: Icd71ec99f06434896c73cff5a52cd3a5ad6ce5f3 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/36839 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/soc/intel/icelake/Kconfig | 1 + src/soc/intel/icelake/fsp_params.c | 10 ++++------ 2 files changed, 5 insertions(+), 6 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index cb9de149d3..a2fe5ed3da 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -60,6 +60,7 @@ config CPU_SPECIFIC_OPTIONS select UDK_2017_BINDING select DISPLAY_FSP_VERSION_INFO select HECI_DISABLE_USING_SMM + select USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI config DCACHE_RAM_BASE default 0xfef00000 diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c index 62c69da2f2..448b82c7d8 100644 --- a/src/soc/intel/icelake/fsp_params.c +++ b/src/soc/intel/icelake/fsp_params.c @@ -84,12 +84,10 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) for (i = 0; i < ARRAY_SIZE(params->Usb3OverCurrentPin); i++) params->Usb3OverCurrentPin[i] = 0; - if (CONFIG(USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI)) { - params->CpuMpPpi = (uintptr_t) mp_fill_ppi_services_data(); - params->SkipMpInit = 0; - } else { - params->SkipMpInit = !CONFIG_USE_INTEL_FSP_MP_INIT; - } + /* Mandatory to make use of CpuMpPpi implementation from ICL onwards */ + params->CpuMpPpi = (uintptr_t) mp_fill_ppi_services_data(); + /* TODO: Remove me as SkipMpInit is getting deprecated */ + params->SkipMpInit = 0; mainboard_silicon_init_params(params); -- cgit v1.2.3