From 8d5b6747391919a8de05dd19308acc79f2b22659 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 27 Sep 2021 13:04:28 +0200 Subject: soc/intel/braswell: Set GNVS DPTE via devicetree Introduce the `dptf_enable` devicetree setting to set the DPTE GNVS field, as newer Intel platforms do. Change-Id: I88b746c64ca57604f946eefb00a70487a2fb27c0 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/57988 Tested-by: build bot (Jenkins) Reviewed-by: Frans Hendriks Reviewed-by: Matt DeVillier --- src/soc/intel/braswell/acpi.c | 6 ++++++ src/soc/intel/braswell/chip.h | 2 ++ 2 files changed, 8 insertions(+) (limited to 'src/soc') diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index 85e70276e4..cb9cb2dd56 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -26,6 +26,8 @@ #include #include +#include "chip.h" + #define MWAIT_RES(state, sub_state) \ { \ .addrl = (((state) << 4) | (sub_state)), \ @@ -68,6 +70,10 @@ size_t size_of_dnvs(void) void soc_fill_gnvs(struct global_nvs *gnvs) { + const struct soc_intel_braswell_config *config = config_of_soc(); + + gnvs->dpte = config->dptf_enable; + /* Fill in the Wi-Fi Region ID */ if (CONFIG(HAVE_REGULATORY_DOMAIN)) gnvs->cid1 = wifi_regulatory_domain(); diff --git a/src/soc/intel/braswell/chip.h b/src/soc/intel/braswell/chip.h index d493ad1688..53627be577 100644 --- a/src/soc/intel/braswell/chip.h +++ b/src/soc/intel/braswell/chip.h @@ -42,6 +42,8 @@ enum usb_comp_bg_value { struct soc_intel_braswell_config { bool enable_xdp_tap; + bool dptf_enable; + enum serirq_mode serirq_mode; /* Disable SLP_X stretching after SUS power well loss */ -- cgit v1.2.3