From 8b518776dacc929b52f5d2f89cc36c8eef361daa Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Thu, 8 Sep 2022 13:15:37 -0700 Subject: soc/intel/meteorlake: Update `pch_thermal_trip` for MTL This patch updates `pch_thermal_trip` as per Intel MTL vol1 chapter 14. Additionally, dropped the `FIXME` tag for `pch_thermal_trip`. TEST=Able to boot the Google/rex to ChromeOS. Signed-off-by: Subrata Banik Change-Id: I86f97c9245fe953832d3b408aa902d6a41e55651 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67461 Reviewed-by: Tarun Tuli Tested-by: build bot (Jenkins) Reviewed-by: Kapil Porwal Reviewed-by: Eric Lai --- src/soc/intel/meteorlake/chipset.cb | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/meteorlake/chipset.cb b/src/soc/intel/meteorlake/chipset.cb index 4784e3b38c..af9049076b 100644 --- a/src/soc/intel/meteorlake/chipset.cb +++ b/src/soc/intel/meteorlake/chipset.cb @@ -16,8 +16,7 @@ chip soc/intel/meteorlake # NOTE: if any variant wants to override this value, use the same format # as register "common_soc_config.pch_thermal_trip" = "value", instead of # putting it under register "common_soc_config" in overridetree.cb file. - #FIXME: update value for MTL - register "common_soc_config.pch_thermal_trip" = "100" + register "common_soc_config.pch_thermal_trip" = "130" device domain 0 on device pci 00.0 alias system_agent on end -- cgit v1.2.3