From 89815c96a60a89104cf75230f03de16690e9276c Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Fri, 23 Oct 2020 15:24:30 -0600 Subject: soc/amd/picasso: Put transfer buffer into common ld file Instead of having the same linker layout for the transfer buffer between the x86 & PSP linker layout scripts, put the common layout into a file shared between the other linker scripts. BUG=None TEST=Boot zork board, verify the buffers are aligned. BRANCH=Zork Signed-off-by: Martin Roth Change-Id: Ib9d9d8b046bc9e9e7a4ee939324960bfc44c3508 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46900 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/soc/amd/picasso/memlayout_psp_verstage.ld | 11 +---------- src/soc/amd/picasso/memlayout_transfer_buffer.inc | 19 +++++++++++++++++++ src/soc/amd/picasso/memlayout_x86.ld | 9 ++------- 3 files changed, 22 insertions(+), 17 deletions(-) create mode 100644 src/soc/amd/picasso/memlayout_transfer_buffer.inc (limited to 'src/soc') diff --git a/src/soc/amd/picasso/memlayout_psp_verstage.ld b/src/soc/amd/picasso/memlayout_psp_verstage.ld index 4ad88b1108..e7a6c84000 100644 --- a/src/soc/amd/picasso/memlayout_psp_verstage.ld +++ b/src/soc/amd/picasso/memlayout_psp_verstage.ld @@ -51,16 +51,7 @@ SECTIONS ALIGN_COUNTER(64) _everstage = .; - ALIGN_COUNTER(64) - _transfer_buffer = .; - REGION(transfer_info, ., TRANSFER_INFO_SIZE, 4) - ALIGN_COUNTER(64) - REGION(vboot2_work, ., VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE, 64) - ALIGN_COUNTER(64) - PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE) - TIMESTAMP(., TIMESTAMP_BUFFER_SIZE) - FMAP_CACHE(., FMAP_SIZE) - _etransfer_buffer = .; + #include "memlayout_transfer_buffer.inc" PSP_VERSTAGE_TEMP_STACK_END = (PSP_VERSTAGE_TEMP_STACK_START + PSP_VERSTAGE_TEMP_STACK_SIZE ); diff --git a/src/soc/amd/picasso/memlayout_transfer_buffer.inc b/src/soc/amd/picasso/memlayout_transfer_buffer.inc new file mode 100644 index 0000000000..a88e81ac32 --- /dev/null +++ b/src/soc/amd/picasso/memlayout_transfer_buffer.inc @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#if CONFIG(VBOOT) + ALIGN_COUNTER(64) + _transfer_buffer = .; + REGION(transfer_info, ., TRANSFER_INFO_SIZE, 4) + + ALIGN_COUNTER(64) + VBOOT2_WORK(., VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE) +#endif + + ALIGN_COUNTER(64) + PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE) + TIMESTAMP(., TIMESTAMP_BUFFER_SIZE) + FMAP_CACHE(., FMAP_SIZE) + +#if CONFIG(VBOOT) + _etransfer_buffer = .; +#endif diff --git a/src/soc/amd/picasso/memlayout_x86.ld b/src/soc/amd/picasso/memlayout_x86.ld index 00cdde6488..eeb6dda0cf 100644 --- a/src/soc/amd/picasso/memlayout_x86.ld +++ b/src/soc/amd/picasso/memlayout_x86.ld @@ -75,16 +75,11 @@ SECTIONS #if CONFIG(VBOOT) PSP_SHAREDMEM_DRAM_START(CONFIG_PSP_SHAREDMEM_BASE) - _transfer_buffer = .; - REGION(transfer_info, ., TRANSFER_INFO_SIZE, 4) - VBOOT2_WORK(., VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE) #endif - PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE) - TIMESTAMP(., TIMESTAMP_BUFFER_SIZE) - FMAP_CACHE(., FMAP_SIZE) +#include "memlayout_transfer_buffer.inc" + #if CONFIG(VBOOT) - _etransfer_buffer = .; PSP_SHAREDMEM_DRAM_END(CONFIG_PSP_SHAREDMEM_BASE + CONFIG_PSP_SHAREDMEM_SIZE) #endif _ = ASSERT((CONFIG_BOOTBLOCK_ADDR + CONFIG_C_ENV_BOOTBLOCK_SIZE - 0x10) == CONFIG_X86_RESET_VECTOR, "Reset vector should be -0x10 from end of bootblock"); -- cgit v1.2.3