From 88615629c051de0833e690463cef6967f0708c0c Mon Sep 17 00:00:00 2001 From: Felix Held Date: Tue, 19 Jan 2021 23:51:45 +0100 Subject: soc/amd/cezanne: include LAPIC code and set MAX_CPUS to 16 Change-Id: I97c73324900a0677165afa3f5b182a336d534968 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/49730 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson Reviewed-by: Jason Glenesk --- src/soc/amd/cezanne/Kconfig | 4 ++++ src/soc/amd/cezanne/Makefile.inc | 1 + 2 files changed, 5 insertions(+) (limited to 'src/soc') diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 1a38c77b67..83825cd387 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -108,6 +108,10 @@ config MMCONF_BUS_NUMBER int default 64 +config MAX_CPUS + int + default 16 + config CONSOLE_UART_BASE_ADDRESS depends on CONSOLE_SERIAL && AMD_SOC_CONSOLE_UART hex diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index 01dc97e819..9a4aa80ae1 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -2,6 +2,7 @@ ifeq ($(CONFIG_SOC_AMD_CEZANNE),y) +subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr # Beware that all-y also adds the compilation unit to verstage on PSP -- cgit v1.2.3