From 854491db63c9eb90a82d8453ea4ca5b97386567c Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 14 Jul 2023 19:49:05 +0200 Subject: soc/amd/common/lpc/lpc_util: use PM register mapping in ACPIMMIO region In all SoC lpc_early_init gets called either after a call to enable_acpimmio_decode_pm04() or the ACPIMMIO mapping is already enabled after reset on the SoC. This allows to use pm_read8 and pm_write8 that use the ACPIMMIO mapping of the PM registers to set the PM_LPC_ENABLE bit in the PM_LPC_GATING register instead of pm_io_read8 and pm_io_write8 which won't work on Phoenix and Glinda due to the IO ports used on older generations to access to the PM registers not being implemented any more. Signed-off-by: Felix Held Change-Id: I8b31ec4e03a06796502c89e3c2cfaac2d41b0ed9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76461 Reviewed-by: Raul Rangel Tested-by: build bot (Jenkins) --- src/soc/amd/common/block/lpc/lpc_util.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc') diff --git a/src/soc/amd/common/block/lpc/lpc_util.c b/src/soc/amd/common/block/lpc/lpc_util.c index 53bd090b6c..309825a841 100644 --- a/src/soc/amd/common/block/lpc/lpc_util.c +++ b/src/soc/amd/common/block/lpc/lpc_util.c @@ -347,9 +347,9 @@ static void lpc_enable_controller(void) u8 byte; /* Enable LPC controller */ - byte = pm_io_read8(PM_LPC_GATING); + byte = pm_read8(PM_LPC_GATING); byte |= PM_LPC_ENABLE; - pm_io_write8(PM_LPC_GATING, byte); + pm_write8(PM_LPC_GATING, byte); } void lpc_early_init(void) -- cgit v1.2.3