From 8315622ff1bd898d839144abf0310524a35f8e1a Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Thu, 13 Nov 2014 13:16:28 -0700 Subject: google/rush: Add I2C1 init and audio clock enable/resets This should allow the max98090 codec to play beeps via AHUB/I2S1 thru the depthcharge sound driver. BUG=none BRANCH=none TEST=Saw max98090 codec init signon and register dump. No sound yet. Change-Id: I1ee0b61f5cbfe587ebd16b7dd9dce08d9d62c2c5 Signed-off-by: Patrick Georgi Original-Commit-Id: f4ee2ce3704711a9e00531b7599a1bcf194203ec Original-Change-Id: I0bc8401e76b2c80a01083ac933a39f6cd4d1b78a Original-Signed-off-by: Tom Warren Original-Reviewed-on: https://chromium-review.googlesource.com/229496 Original-Reviewed-by: Aaron Durbin Original-Commit-Queue: Mike Frysinger Reviewed-on: http://review.coreboot.org/9429 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/nvidia/tegra132/include/soc/clock.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/soc') diff --git a/src/soc/nvidia/tegra132/include/soc/clock.h b/src/soc/nvidia/tegra132/include/soc/clock.h index f0d05e1750..e62e0aad32 100644 --- a/src/soc/nvidia/tegra132/include/soc/clock.h +++ b/src/soc/nvidia/tegra132/include/soc/clock.h @@ -187,6 +187,9 @@ enum { PLLE = 7, PLLA = 8, UNUSED = 100, + UNUSED1 = 101, + UNUSED2 = 102, + UNUSED3 = 103, }; #define CLK_SRC_DEV_ID(dev, src) CLK_SRC_##dev##_##src @@ -221,6 +224,8 @@ enum { CLK_SRC_DEVICE(SDMMC3, PLLP, PLLC2, PLLC, PLLC3, PLLM, PLLE, CLK_M), CLK_SRC_DEVICE(SDMMC4, PLLP, PLLC2, PLLC, PLLC3, PLLM, PLLE, CLK_M), CLK_SRC_DEVICE(UARTA, PLLP, PLLC2, PLLC, PLLC3, PLLM, UNUSED, CLK_M), + CLK_SRC_DEVICE(i2s1, PLLA, UNUSED, CLK_S, UNUSED1, PLLP, UNUSED2, CLK_M), + CLK_SRC_DEVICE(extperiph1, PLLA, CLK_S, PLLP, CLK_M, PLLE, UNUSED, UNUSED1), }; /* PLL stabilization delay in usec */ -- cgit v1.2.3